Chip-scale carrier for semiconductor devices including mounted spring contacts

• US 6,023,103 A
• Filed: 06/30/1998
• Issued: 02/08/2000
• Est. Priority Date: 11/15/1994
• Status: Expired due to Fees

• Current Assignee: FormFactor Incorporated
• Original Assignee: FormFactor Incorporated
• Inventors: Khandros, Igor Y., Smith, William D., Chang, Sung Chul
• Primary Examiner(s): Graybill, David E.
• Application Number:
  US09/106,943
• Time in Patent Office: 588 Days
• Field of Search: 257/781, 257/784, 438/117, 438/617
• US Class Current: 257/781
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 23/3114 the device being a chip scale package, e.g. CSP
• CPC Class Codes: H01L 23/4951 Chip-on-leads or leads-on-chip techniques, i.e. inner lead fingers being used as die pad
• CPC Class Codes: H01L 23/49517 Additional leads
• CPC Class Codes: H01L 23/4985 Flexible insulating substrates H01L23/49572 and H01L23/49855 take precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/014 Solder alloys
• CPC Class Codes: H01L 2924/19041 being a capacitor
• CPC Class Codes: H01L 2924/30107 Inductance
• CPC Class Codes: H01L 2924/3011 Impedance
• CPC Class Codes: H01L 2924/3025 Electromagnetic shielding

Abstract

A plurality of free-standing resilient contact structures (spring elements) are mounted to a surface of a carrier substrate. The carrier substrate is mounted to a surface of a semiconductor device, or one or more unsingulated semiconductor dies. Bond pads of the semiconductor device are connected to the spring elements by bond wires extending between the bond pads and terminals associated with the spring elements. The carrier substrate is mounted to one or more semiconductor devices prior to the semiconductor devices being singulated from a semiconductor wafer upon which they are formed. Resilience and compliance to effect pressure connections to the semiconductor device are provided by the spring elements extending from the carrier substrate, per se. The carrier substrate is pre-fabricated, by mounting the spring elements thereto prior to mounting the carrier substrate to the semiconductor device(s), or vice-versa.

Claims

1. Semiconductor assembly, comprising:

a semiconductor die having a surface and bond pads on the surface;

a carrier substrate mounted to the surface of the semiconductor die, and having a surface and terminals on the surface;

bond wires connecting the bond pads to the terminals; and

spring elements extending from the terminals, away from the surface of the semiconductor die,

each spring element including;

an elongate element, of a first material, having a portion connected to a respective terminal of the substrate; and

a second material, on the elongate element, wherein the elongate element is flexible without the second material, and the elongate element and the second material together are resilient.

2. Semiconductor assembly, according to claim 1, wherein:

the spring elements are composite interconnection elements.

3. Semiconductor assembly, according to claim 1, further comprising:

a first plurality of terminals and a second plurality of terminals on the surface of the carrier substrate;

a plurality of conductive lines on the surface of the carrier substrate connecting corresponding ones of the first plurality of terminals and the second plurality of terminals;

the spring elements extend from the first plurality of terminals; and

the bond wires are connected to the second plurality of terminals.

4. Semiconductor assembly, according to claim 1, wherein:

the carrier substrate spans at least two adjacent unsingulated semiconductor dies.

5. Semiconductor assembly, according to claim 1, wherein:

the spring elements have core wire stems which are contiguous with the bond wires.

6. Semiconductor assembly, comprising:

a semiconductor die having bond pads on a surface thereof;

a carrier substrate mounted to the surface of the semiconductor die, and having terminals on a surface thereof;

bond wires extending between the bond pads and the terminals and further extending contiguously as free-standing wire stems from the surface of the carrier substrate, away from the surface of the semiconductor die; and

at least one layer of an electrically conductive material overcoating at least the free-standing wire stems;

each free-standing wire stem with overcoating including;

an elongate element, of a first material, having a portion connected to a respective terminal of the substrate; and

a second material, on the elongate element, wherein the elongate element is flexible without the second material, and the elongate element and the second material together are resilient.

7. Semiconductor assembly, according to claim 6, further comprising:

encapsulant disposed over the surface of the semiconductor die and extending to a portion of the overcoated wire stems adjacent the carrier substrate.

8. Semiconductor assembly, according to claim 6, wherein:

the carrier substrate spans at least two adjacent unsingulated semiconductor dies.

9. Chip-scale carrier, comprising:

a multi-layer substrate including at least a first insulating layer, a first conductive layer patterned to have individual conductive lines disposed atop the first insulating layer, a second insulating layer disposed atop the first conductive layer, and a second conductive layer patterned to have individual conductive lines disposed atop the second insulating layer;

wherein;

the second insulating layer is generally centrally located upon the first conductive layer and is sized to permit two end portions of each of the individual conductive lines of the first conductive layer to be exposed at corresponding two side edges of the second insulating layer; and

each of the individual conductive lines of the second conductive layer have two end portions;

further comprising;

a first plurality of spring elements extending from one end portion of the conductive lines of the first conductive layer; and

a second plurality of spring elements extending from one end portion of the conductive lines of the second conductive layer.

10. Chip-scale carrier, according to claim 9, wherein:

the multi-layer substrate is sized to sit atop a semiconductor die having bond pads.

11. Chip-scale carrier, according to claim 10, further comprising:

first bond wires extending between selected first ones of the bond pads and corresponding end portions of selected of ones conductive lines of the first conductive layer, thereby connecting the selected first ones of the bond pads to corresponding ones of the first plurality of spring elements extending from the one portion of the conductive lines of the first conductive layer, and

second bond wires extending between selected second ones of the bond pads and corresponding end portions of selected ones of conductive lines of the second conductive layer, thereby connecting the selected second ones of the bond pads to corresponding ones of the second plurality of spring elements extending from the one portion of the conductive lines of the second conductive layer.

12. Semiconductor assembly, according to claim 11, wherein:

the spring elements are composite interconnection elements.