Method for controlling the output voltage of a DC-DC converter

• US 6,025,706 A
• Filed: 03/17/1999
• Issued: 02/15/2000
• Est. Priority Date: 08/21/1998
• Status: Expired due to Fees

• Current Assignee: Fujitsu Semiconductor Limited (Fujitsu Limited)
• Original Assignee: Fujitsu Limited
• Inventors: Takimoto, Kyuichi, Matsuyama, Toshiyuki
• Primary Examiner(s): BERHANE, ADOLF D
• Application Number:
  US09/271,240
• Time in Patent Office: 335 Days
• Field of Search: 323/282, 323/284, 323/285, 323/288, 323/234, 323/351
• US Class Current: 323/282
• CPC Class Codes: H02M 3/156 with automatic control of output voltage or current, e.g. switching regulators

Abstract

A DC--DC converter includes an offset comparator that compares an output voltage with a reference voltage in parallel with an error amplification circuit, which also compares the output voltage with the reference voltage. The offset comparator has a predetermined offset voltage set between its input terminals so that the offset comparator outputs a high signal when the voltage difference between its inputs exceeds the predetermined level. The output of the offset comparator is input, along with the error amplification circuit output, into a PWM comparator. The signal output by the offset voltage comparator allows the DC--DC converter to more quickly respond to a sudden increase in current consumption by a connected load. In responding to the increased current draw, the DC--DC converter quickly converges back at the reference voltage, such that the DC--DC converter provides a very stable output voltage.

Claims

1. A method for controlling the output voltage of a DC--DC converter, comprising the steps of:

generating an error output signal indicating the voltage difference between the output voltage the DC--DC converter and a reference voltage;

generating a comparison signal by comparing the voltage difference and a predetermined offset voltage, wherein the comparison signal having a predetermined level is generated when the voltage difference is equal to or greater than the predetermined offset voltage;

generating a triangular wave signal;

generating a duty control signal having a predetermined duty ratio by comparing the triangular wave signal and one of the error output signal and the comparison signal, wherein the duty control signal having the maximum duty ratio and the comparison signal having a predetermined level are generated substantially simultaneously; and

generating the output voltage by causing an output transistor to turn on or off in response to the duty control signal, wherein the output transistor is turned on while the duty control signal having the maximum duty ratio is being supplied to the output transistor.

2. A method for controlling the output voltage of a DC--DC converter, comprising the steps of:

generating an error output signal indicating the voltage difference between the output voltage of the DC--DC converter and a reference voltage;

generating a triangular wave signal;

generating a duty control signal having a predetermined duty ratio by comparing the error output signal and the triangular wave signal;

generating a comparison signal by comparing the voltage difference between the output voltage and the reference voltage and a predetermined offset voltage, wherein the comparison signal having a predetermined level is generated when the voltage difference is equal to or greater than the predetermined offset voltage; and

generating the output voltage by causing an output transistor to turn on or off in response to the duty control signal, wherein the comparison signal is supplied to the output transistor instead of the duty control signal to cause the output transistor to be turned on.

3. A control circuit for controlling the output voltage of a DC--DC converter by controlling a first output transistor of the DC--DC converter, comprising:

an error amplification circuit for comparing the output voltage of the DC--DC converter and a reference voltage and generating an error output signal indicating the voltage difference between the output voltage of the DC--DC converter and the reference voltage;

an offset comparator for comparing a predetermined offset voltage and the error output signal and generating a comparison signal, wherein the comparison signal has a predetermined level when the error output signal is equal to or greater than the predetermined offset voltage;

a triangular wave oscillation circuit for generating a triangular wave signal; and

a first PWM comparator, connected to the error amplification circuit, the offset comparator, and the triangular oscillation circuit, for comparing the triangular wave signal and one of the error output signal and the comparison signal, generating a first duty control signal having a predetermined duty ratio and supplying the first duty control signal to the first output transistor, wherein the first duty control signal has a maximum duty ratio which turns on the first output transistor when the comparison signal having the predetermined level is supplied from the offset comparator to the first PWM comparator.

4. The control circuit of claim 3, wherein the offset comparator includes a first transistor having a gate for receiving the output voltage and a second transistor having a gate for receiving the reference voltage, and wherein the first and second transistors have different sizes.

5. The control circuit of claim 3, wherein the offset comparator includes a resistance dividing circuit for dividing the reference voltage and generating a voltage in which the predetermined offset voltage is subtracted from the reference voltage, and wherein the offset comparator compares the output voltage and the voltage generated by the resistance dividing circuit.

6. The control circuit of claim 3, wherein the DC--DC converter further includes a second transistor connected in series with the first output transistor, and wherein the control circuit, further comprises:

a second PWM comparator, connected to the error amplification circuit, the offset comparator, and the triangular wave oscillation circuit, for comparing the triangular wave signal and one of the error output signal and the comparison signal, generating a second duty control signal, which is an inverse of the first duty signal, and supplying the second duty control signal to the second output transistor.

7. A control circuit for controlling the output voltage of a DC--DC converter by controlling a first output transistor of the DC--DC converter, comprising:

an error amplification circuit for comparing the output voltage of the DC--DC converter and a reference voltage and generating the error output signal indicating the voltage difference between the output voltage of the DC--DC converter and the reference voltage;

an offset comparator for comparing a predetermined offset voltage and the error output signal and generating a comparison signal, wherein the comparison signal has a predetermined level when the error signal is equal to or greater than the predetermined offset voltage; and

a triangular wave oscillation circuit for generating a triangular wave signal;

a first PWM comparator, connected to the error amplification circuit and the triangular oscillation circuit, for comparing the error output signal and the triangular wave signal and supplying a first duty control signal having a predetermined duty ratio; and

a selection circuit, connected to the offset comparator and the first PWM comparator, for selecting one of the comparison signal and the first duty control signal and supplying the selected signal to the first output transistor, wherein the selection circuit supplies the comparison signal to the first output transistor to turn on the first output transistor when the comparison signal having the predetermined level is generated.

8. The control circuit of claim 7, wherein the offset comparator includes a first transistor having a gate for receiving the output voltage and a second transistor having a gate for receiving the reference voltage, and wherein the first and second transistors have different sizes.

9. The control circuit of claim 7, wherein the offset comparator includes a resistance dividing circuit for dividing the reference voltage and generating a voltage in which the predetermined offset voltage is subtracted from the reference voltage, and wherein the offset comparator compares the output voltage and the voltage generated by the resistance dividing circuit.

10. The control circuit of claim 7, wherein the selection circuit is an OR circuit.

11. The control circuit of claim 7, wherein the DC--DC converter further includes a second transistor connected in series with the first output transistor, and the control circuit further comprises:

a second PWM comparator, connected to the error amplification circuit and the triangular wave oscillation circuit, for comparing the error output signal and the triangular wave signal and generating a second duty control signal, which is an inverse of the first duty signal; and

a logic circuit, connected to the offset comparator and the second PWM comparator, receiving the comparison signal and the second duty control signal and supplying an inverse selection signal, which is the inverse of the selection signal, to the second output transistor.

12. The control circuit of claim 11, wherein the logic circuit is an AND circuit.

13. A DC--DC converter for generating an output voltage, comprising:

a smoothing circuit;

a first output transistor, connected to the smoothing circuit, for generating the output voltage;

an error amplification circuit for comparing the output voltage and a reference voltage and generating an error output signal indicating the voltage difference between the output voltage and the reference voltage;

an offset comparator for comparing a predetermined offset voltage and the error output signal and generating a comparison signal, wherein the comparison signal has a predetermined level when the error output signal is equal to or greater than the predetermined offset voltage;

a triangular wave oscillation circuit for generating a triangular wave signal; and

a first PWM comparator, connected to the error amplification circuit, the offset comparator, and the triangular oscillation circuit, for comparing the triangular wave signal and one of the error output signal and the comparison signal, generating a first duty control signal having a predetermined duty ratio and supplying the first duty control signal to the first output transistor, wherein the first duty control signal has a maximum duty ratio which turns on the first output transistor when the comparison signal having the predetermined level is supplied from the offset comparator to the first PWM comparator.

14. The DC--DC converter of claim 13, wherein the offset comparator includes a first transistor having a gate for receiving the output voltage and a second transistor having a gate for receiving the reference voltage, and wherein the first and second transistors have different sizes for setting the predetermined offset voltage.

15. The DC--DC converter of claim 13, wherein the offset comparator includes a resistance dividing circuit for dividing the reference voltage and generating a voltage in which the predetermined offset voltage is subtracted from the reference voltage, and wherein the offset comparator compares the output voltage and the voltage generated by the resistance dividing circuit.

16. The DC--DC converter of claim 13, further comprising:

a second output transistor connected in series with the first output transistor; and

a second PWM comparator, connected to the error amplification circuit, the offset comparator, and the triangular wave oscillation circuit, for comparing the triangular wave signal and one of the error output signal and the comparison signal and supplying a second duty control signal, which is an inverse of the first duty signal, to the second output transistor.

17. A DC--DC converter for generating an output voltage, comprising:

a smoothing circuit;

a first output transistor, connected to the smoothing circuits, for generating the output voltage;

an error amplification circuit for comparing the output voltage and a reference voltage and generating an error output signal indicating the voltage difference between the output voltage of the DC--DC converter and the reference voltage;

an offset comparator for comparing a predetermined offset voltage and the error output signal and generating a comparison signal, wherein the comparison signal has a predetermined level when the error signal is equal to or greater than the predetermined offset voltage; and

a triangular wave oscillation circuit for generating a triangular wave signal;

a first PWM comparator, connected to the error amplification circuit and the triangular oscillation circuit, for comparing the error output signal and the triangular wave signal and supplying a first duty control signal having a predetermined duty ratio; and

a selection circuit, connected to the offset comparator and the first PWM comparator, for selecting one of the comparison signal and the first duty control signal and supplying the selected signal to the first output transistor, wherein the selection circuit supplies the comparison signal to the first output transistor to turn on the first output transistor during the time when the comparison signal having the predetermined level is generated.

18. The DC--DC converter of claim 17, wherein the offset comparator includes a first transistor having a gate for receiving the output voltage and a second transistor having a gate for receiving the reference voltage, and wherein the first and second transistors have different sizes for setting the predetermined offset voltage.

19. The DC--DC converter of claim 17, wherein the offset comparator includes a resistance dividing circuit for dividing the reference voltage and generating a voltage in which the predetermined offset voltage is subtracted from the reference voltage, and wherein the offset comparator compares the output voltage and the voltage generated by the resistance dividing circuit.

20. The DC--DC converter of claim 17, wherein the selection circuit is an OR circuit.

21. The DC--DC converter of claim 17, further comprising:

a second output transistor connected in series with the first output transistor;

a second PWM comparator, connected to the error amplification circuit and the triangular wave oscillation circuit, for comparing the error output signal and the triangular wave signal and generating a second duty control signal, which is an inverse of the first duty signal; and

a logic circuit, connected to the offset comparator and the second PWM comparator, for receiving the comparison signal and the second duty control signal and supplying an inverse selection signal, which is an inverse of the selected signal, to the second output transistor.

22. The DC--DC converter of claim 21, wherein the logic circuit is an AND circuit.

23. A control circuit for controlling the output voltage of a DC--DC converter, comprising:

an error amplification circuit having an inverting input terminal that receives the output voltage of the DC--DC converter and a noninverting input terminal that receives a reference voltage, the error amplification circuit comparing the output voltage and the reference voltage and generating an error amplification signal;

an offset comparator having an inverting input terminal that receives the output voltage of the DC--DC converter and a noninverting input terminal that receives the reference voltage, the offset comparator comparing the output voltage and the reference voltage and generating a comparison signal, wherein when the output voltage is less than the reference voltage by more than a predetermined offset voltage value, the comparison signal has a high value;

a triangular wave oscillation circuit for generating a triangle wave signal; and

a first PWM comparator having a first noninverting input terminal connected to the error amplification circuit and receiving the error output signal, a second noninverting input terminal connected to the offset comparator and receiving the comparison signal, an inverting input terminal connected to the triangular wave oscillation circuit and receiving the triangle wave signal, and an output terminal connected to an output transistor of the DC--DC converter, the first PWM comparator comparing the triangle wave signal to the larger one of the error output signal and the comparison signal, and generating a first duty control signal therefrom, wherein the first duty control signal has a maximum duty ratio which turns on the output transistor when the comparison signal has the high value.

24. The control circuit of claim 23, wherein the high value of the comparison signal is set to be equal to or greater than a maximum level of the triangular wave signal.

25. The control circuit of claim 24, wherein a low value of the comparison signal is set to be equal to or less than a minimum level of the triangular wave signal.

26. The control circuit of claim 23, wherein the offset comparator comprises:

an input circuit including a first transistor and a second transistor, wherein the collectors of the first and second transistors are connected together and to a high potential power supply by way of a first current source, the base of the first transistor is the noninverting input terminal that receives the reference voltage and the base of the second transistor is the inverting input terminal that receives the output voltage of the DC--DC converter, the emitter of the first transistor is connected to ground by way of a third transistor, and the emitter of the second transistor is connected to ground by way of a fourth transistor;

an output circuit including a fifth transistor and a sixth transistor, wherein the collector of the fifth transistor is connected to the high potential power supply by way of a second current source, the emitter of the fifth transistor is connected to ground, and the base of the fifth transistor is connected to a first node between the collectors of the second and fourth transistors, and the collector of the sixth transistor is connected to the high potential power supply by way of a third current source, the emitter of the sixth transistor is connected to ground, and the base of the sixth transistor is connected to a second node between the collector of the fifth transistor and the second current source; and

an output terminal at a third node between the collector of the sixth transistor and the third current source.

27. The control circuit of claim 26, wherein the predetermined offset voltage value is set by varying the size of the first and second transistors.

28. The control circuit of claim 26, further comprising a voltage divider circuit connected to the noninverting input terminal of the offset comparator.

29. The control circuit of claim 28, wherein the voltage divider circuit includes a first resistor and a second resistor connected in series between the reference voltage and ground, and wherein the noninverting input terminal is connected to a fourth node located between the first and second resistors.