Network architecture

• US 6,026,088 A
• Filed: 03/28/1995
• Issued: 02/15/2000
• Est. Priority Date: 10/20/1993
• Status: Expired due to Term

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: LSI Logic Corporation (Broadcom, Inc.)
• Inventors: Desai, Sanjay, Rostoker, Michael D., Daane, John P., Stelliga, D. Tony
• Primary Examiner(s): HSU, ALPUS
• Application Number:
  US08/412,536
• Time in Patent Office: 1,785 Days
• Field of Search: 364/514 R, 364/514 A, 364/514 C, 395/200.02, 395/200.2, 395/285, 395/309, 395/311, 395/500, 395/800, 370/357, 370/360, 370/395, 370/396, 370/400, 370/401, 370/402, 370/403, 370/404, 370/405, 370/406, 370/407, 370/408, 370/410, 370/419, 370/420, 370/421, 370/465, 370/466 , 370/467, 370/474, 370/522
• US Class Current: 370/395.53
• CPC Class Codes: G06F 13/128 for dedicated transfers to a network for protocol converters G06F13/387
• CPC Class Codes: H04L 12/40032 Details regarding a bus interface enhancer
• CPC Class Codes: H04L 12/5601 Transfer mode dependent, e.g. ATM
• CPC Class Codes: H04L 2012/5613 Bus (including DQDB)
• CPC Class Codes: H04L 2012/5616 Terminal equipment, e.g. codecs, synch.
• CPC Class Codes: H04L 2012/5635 Backpressure, e.g. for ABR
• CPC Class Codes: H04L 2012/5638 Services, e.g. multimedia, GOS, QOS
• CPC Class Codes: H04L 2012/5653 using the ATM adaptation layer [AAL]
• CPC Class Codes: H04L 2012/5664 Support of Video, e.g. MPEG
• CPC Class Codes: H04L 2012/5681 Buffer or queue management
• CPC Class Codes: H04L 45/745 Address table lookup; Address filtering
• CPC Class Codes: H04L 49/109 Integrated on microchip, e.g. switch-on-chip
• CPC Class Codes: H04L 49/206 Real Time traffic
• CPC Class Codes: H04L 49/25 Routing or path finding in a switch fabric
• CPC Class Codes: H04L 49/3081 ATM peripheral units, e.g. policing, insertion or extraction
• CPC Class Codes: H04L 49/90 Buffering arrangements
• CPC Class Codes: H04L 49/901 using storage descriptor, e.g. read or write pointers
• CPC Class Codes: H04L 49/9057 Arrangements for supporting packet reassembly or resequencing
• CPC Class Codes: H04L 49/9063 Intermediate storage in different physical parts of a node or terminal
• CPC Class Codes: H04L 49/9078 using an external memory or storage device
• CPC Class Codes: H04L 49/9094 : Arrangements for simultaneous transmit and receive, e.g. simultaneous reading/writing from/to the storage element
• CPC Class Codes: H04N 19/00 : Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
• CPC Class Codes: H04N 19/42 : characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation H04N19/635 takes precedence
• CPC Class Codes: H04N 19/61 : in combination with predictive coding
• CPC Class Codes: H04N 19/70 : characterised by syntax aspects related to video coding, e.g. related to compression standards
• CPC Class Codes: H04N 21/2381 : Adapting the multiplex stream to a specific network, e.g. an Internet Protocol [IP] network transmission of MPEG streams over ATM H04L12/5601
• CPC Class Codes: H04N 21/4143 : embedded in a Personal Computer [PC]
• CPC Class Codes: H04N 21/437 : Interfacing the upstream path of the transmission network, e.g. for transmitting client requests to a VOD server flow control in data networks H04L47/10; streaming protocols, e.g. RTP or RTCP, H04L65/65; scheduling or organising the servicing of application requests in data packet switching networks H04L67/60
• CPC Class Codes: H04N 21/4381 : Recovering the multiplex stream from a specific network, e.g. recovering MPEG packets from ATM cells transmission of MPEG streams over ATM H04L12/5601
• CPC Class Codes: H04N 21/4385 : Multiplex stream processing, e.g. multiplex stream decrypting
• CPC Class Codes: H04N 21/4788 : communicating with other users, e.g. chatting arrangements for providing for computer conferences, e.g. chat rooms, to substation in data switching networks H04L12/1813; distributed application using peer-to-peer [P2P] networks H04L67/104
• CPC Class Codes: H04N 21/64 : Addressing network arrangements, protocols or services for addressing or naming H04L61/00; support for multicast or broadcast of one-way stream services H04L65/611
• CPC Class Codes: H04N 21/64307 : ATM
• CPC Class Codes: H04Q 11/0478 : Provisions for broadband connections

Abstract

A digital network system accommodates a plurality of network protocols. The digital network system includes a backbone bus for communicating digital information. A first switching interface unit is coupled to the backbone bus and has at least one port connected to a first network. A second switching interface unit is also coupled to the backbone bus and has at least one port connected to a second network. The first and second interface units transferring digital information in first and second network protocols, respectively. First and second memories are coupled to the backbone bus and to the first and second switching interface units, respectively, and store digital information to be transferred between the switching interface units via the backbone bus. The first switching interface unit and the first memory are formed on a single substrate, and the second switching interface unit and the second memory are formed on a single substrate. A controller is coupled to the backbone bus and controls the transfer of digital information from the first switching interface unit to the second switching interface unit.

Claims

1. A digital network system for accommodating a plurality of network protocols comprising:

a backbone bus for communicating digital information;

a first switching interface unit coupled to the backbone bus having at least one port connected to a first network for transferring digital information in a first network protocol, wherein the first switching interface comprises;

an a synchronous transfer mode (ATM) segmentation and assembly unit connected to the fist memory;

an ATM transmission convergence unit connected to the ATM segmentation and assembly unit; and

a synchronous optical network/synchronous digital hierarchy (SONET/SDH) framer unit connected to the ATM transmission convergence unit for connecting to the first network;

a second switching interface unit coupled to the backbone bus having at least one port connected to a second network for transferring digital information in a second network protocol, wherein the second switching interface unit comprises an Ethernet media access controller (MAC) unit connected to the second memory and a Manchester encoder/decoder (ENDEC) unit for connecting to the second network;

a first memory coupled to the backbone bus and to the first switching interface for storing digital information to be transferred from the first switching interface unit to the second switching interface unit via the backbone bus;

a second memory coupled to the backbone bus and to the second switching interface for storing digital information to be transferred from the second switching interface unit to the first switching interface unit via the backbone bus; and

a controller coupled to the backbone bus for controlling the transfer of digital information from the first switching interface unit to the second switching interface unit;

the first switching interface unit and the first memory being formed on a single substrate; and

the second switching interface unit and the second memory being formed on a single substrate.