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Phase locked loop (PLL) with linear parallel sampling phase detector

  • US 6,026,134 A
  • Filed: 06/19/1997
  • Issued: 02/15/2000
  • Est. Priority Date: 06/19/1997
  • Status: Expired due to Term
First Claim
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1. An apparatus for detecting the phase of an input signal relative to an output signal comprising:

  • a plurality of phase detector circuits each configured to receive (i) said input signal and (ii) a window signal, each phase detector circuit being further configured to generate a phase difference signal in response to said window signal, each of said phase difference signals being proportional to a phase difference between said input signal and said output signal;

    means for generating said output signal in response to said phase difference signals, said output signal having a plurality of phases;

    wherein each phase detector circuit operates according to at least one preselected phase of said output signaland at least one of said phase detector circuits includes a function gate having an output terminal configured to generate a pump up signal, said function gate being connected to a first memory element and further having an enable terminal for receiving said window signal.

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