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Advanced modular cell placement system with overlap remover with minimal noise

  • US 6,026,223 A
  • Filed: 06/28/1996
  • Issued: 02/15/2000
  • Est. Priority Date: 06/28/1996
  • Status: Expired due to Term
First Claim
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1. A computer implemented method for optimizing cell placement for integrated circuit design, comprising the steps of:

  • (a) assigning a plurality of cells to one column of an integrated circuit surface abstraction; and

    (b) arranging cells in the one column to remove overlap between cells while maintaining a running summation of positive and negative cell movement distances for cells in the one column.

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