CMOS comparator

• US 6,028,457 A
• Filed: 05/07/1998
• Issued: 02/22/2000
• Est. Priority Date: 09/18/1996
• Status: Expired due to Fees

• Current Assignee: Siemens AG
• Original Assignee: Siemens AG
• Inventors: Tihanyi, Jenoe
• Primary Examiner(s): Tran, Toan
• Application Number:
  US09/068,353
• Time in Patent Office: 656 Days
• Field of Search: 327/77, 327/78, 327/80, 327/81, 327/143, 327/198, 323/315
• US Class Current: 327/77
• CPC Class Codes: H03K 17/0822 in field-effect transistor switches
• CPC Class Codes: H03K 5/2481 with at least one differential stage

Abstract

The CMOS comparator has four p-channel lateral high-voltage transistors (T₁₁ -T₁₄) which form two first current mirrors, and two n-channel lateral high-voltage transistors (T₃₁, T₃₂) which form a second current mirror. In the current path of the reference voltage, there is a depletion type transistor (T₂) which determines the current flowing there. If the input voltage (U_IN) is equal to the reference voltage (U_ref), then an equal current flows in both current paths. If the input voltage (U_IN) deviates from the reference voltage (U_ref), however, then the output voltage changes dramatically.

Claims

1. A CMOS comparator in which an input voltage is compared with a reference ground voltage, and a voltage signal indicating a difference between the input voltage and the reference ground voltage can be tapped off at an output connection of the CMOS comparator, comprising:

two first current mirrors, each of the first current mirrors having a first transistor and a second transistor;

a second current mirror having a first transistor and a second transistor;

the two first current mirrors and the second current mirror connected in series thereby forming a first current path between a reference ground voltage connection and a bias voltage connection, and forming a second current path between an input voltage connection and the bias voltage connection;

a current source in the first current path between one of the two first current mirrors in the first current path; and

the second current mirror in the first current path; and

an output connection is connected between one of the two first current mirrors in the second current path and the second current mirror in the second current path.

2. The CMOS comparator as claimed in claim 1, wherein each of the two first current mirrors have p-channel lateral high-voltage transistors, a drain of a first p-channel lateral high-voltage transistor being connected to a voltage which is more positive than a bias voltage present at the bias voltage connection.

3. The CMOS comparator as claimed in claim 1, wherein the current source has an n-channel depletion type field effect transistor.

4. The CMOS comparator as claimed in claim 1, wherein the second current mirror has n-channel lateral high-voltage transistors.

5. The CMOS comparator as claimed in claim 1, wherein the CMOS comparator is used in a current mirror switch.

6. A current mirror switch, comprising:

a CMOS comparator, comprising;

two first current mirrors, each of the first current mirrors having a first and a second transistor;

a second current mirror with a first and a second transistor;

the two first current mirrors and the second current mirror connected in series thereby forming a first current path, between a reference ground voltage connection and a bias voltage connection and a second current path, between an input voltage connection and the bias voltage connection;

a current source in the first current path between one of the two first current mirrors and the second current mirror in the first current path;

an output connection of the CMOS comparator connected between the two first current mirrors in the second current path and the second current mirror in the second current path;

the first current mirrors having p-channel lateral high-voltage transistors;

a drain of a first p-channel lateral high voltage transistor being connected to a voltage which is more positive than a bias voltage present at the bias voltage connection;

the high-voltage transistors in the first current mirrors being isolators between the CMOS comparator and a power output;

a first MOSFET and a second MOSFET having drains and gates thereof connected together, the drains of the first MOSFET and the second MOSFET connected to a substrate potential;

a source of the first MOSFET connected to the input voltage connection of the CMOS comparator;

a source of the second MOSFET connected to the power output;

the power output being connected to the reference around voltage connection of the CMOS comparator and to a first end of a load;

a second end of the load connected to the substrate potential;

a resistor and a third MOSFET connected in series between the input voltage connection of the CMOS comparator and the substrate potential, wherein the third MOSFET is controlled from the output connection of the CMOS comparator.

7. The current mirror switch as claimed in claim 6, wherein the third transistor is coupled with its drain to the input of the CMOS comparator.

8. The current as claimed in claim 6, wherein the current source has an n-channel depletion type field effect transistor.

9. The mirror as claimed in claim 6, wherein the second current mirror has n-channel lateral high-voltage transistors.

10. The current mirror switch as claimed in claim 6, wherein a first diode is connected between the drain of the third transistor and the input voltage connection.

11. The current mirror switch as claimed in claim 10, wherein a second diode is connected in antiseries to the first diode between the input voltage connection and the reference ground voltage connection.