Crystal oscillator with controlled duty cycle
First Claim
1. An oscillator with controlled duty cycle comprising:
- a first power rail and a second power rail;
a variable current source having a first terminal, a second terminal and a first control input, said first terminal being coupled to said first power rail, said second terminal being coupled to an intermediate output node;
a switching means having a third terminal and a fourth terminal, and further having a second control input for receiving an oscillating signal having a first duty cycle and oscillating between a first logic state and a second logic state, said third terminal being coupled to said intermediate output node, said fourth terminal being coupled to said second power rail, said switching means being effective for closing and coupling said third terminal to said second power rail in response to said oscillating signal being at said first logic state and effective for opening and isolating said third terminal from said second power rail in response to said oscillating signal being at said second logic state;
a duty cycle monitoring means including a logic inverter, a current starved inverter, a first constant current source having a first control current, and a second constant current source having a second control current, said logic inverter being responsive to said intermediate output node, the output of said logic inverter being coupled to said current starved inverter, said current starved inverter having a pull-up rate dependent on said first control current and having a pull-down rate dependent on said second control current, said current starved inverter being effective for generating a magnitude control output;
coupling means for coupling said magnitude control output to said first control input of said variable current source, said variable current source being effective for generating a current magnitude proportional to said magnitude control output, the ratio of said first control current to said second control current being effective for establishing a predetermined second duty cycle at said intermediate output node.
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Accused Products
Abstract
An oscillator circuit having a first node oscillating with a first indeterminate duty cycle and having a second node oscillating with a predetermined second duty cycle. Both nodes oscillate at similar frequencies. A variable current source and a switch are coupled in series between Vcc and ground with the output of the variable current source being the second node. The first node controls the switch, which is closed when the first node is at a first logic state and is opened when it is at a second logic state. During each cycle, a monitoring circuit measures the time span that the first node is at the first logic state and adjusts the magnitude of the variable current source to make it directly proportional to the measured time span. By adjusting the variable current source, the second node can be made to reach a desired voltage level in a desired amount of time during each cycle. In a second embodiment, a current limiting transistor is inserted between the second node and the switch. The current limiting transistor is controlled by the monitoring circuit and is made to reduce the influence of the switch on the second node as the duty cycle of the first node approaches the predetermined second duty cycle.
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Citations
39 Claims
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1. An oscillator with controlled duty cycle comprising:
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a first power rail and a second power rail; a variable current source having a first terminal, a second terminal and a first control input, said first terminal being coupled to said first power rail, said second terminal being coupled to an intermediate output node; a switching means having a third terminal and a fourth terminal, and further having a second control input for receiving an oscillating signal having a first duty cycle and oscillating between a first logic state and a second logic state, said third terminal being coupled to said intermediate output node, said fourth terminal being coupled to said second power rail, said switching means being effective for closing and coupling said third terminal to said second power rail in response to said oscillating signal being at said first logic state and effective for opening and isolating said third terminal from said second power rail in response to said oscillating signal being at said second logic state; a duty cycle monitoring means including a logic inverter, a current starved inverter, a first constant current source having a first control current, and a second constant current source having a second control current, said logic inverter being responsive to said intermediate output node, the output of said logic inverter being coupled to said current starved inverter, said current starved inverter having a pull-up rate dependent on said first control current and having a pull-down rate dependent on said second control current, said current starved inverter being effective for generating a magnitude control output; coupling means for coupling said magnitude control output to said first control input of said variable current source, said variable current source being effective for generating a current magnitude proportional to said magnitude control output, the ratio of said first control current to said second control current being effective for establishing a predetermined second duty cycle at said intermediate output node. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. An oscillator with controlled duty cycle comprising:
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a first power rail and a second power rail; a variable current source having a first terminal, a second terminal and a first control input, said first terminal being coupled to said first power rail, said second terminal being coupled to an intermediate output node; a transistor having a third terminal and a fourth terminal, and further having a second control input for receiving an oscillating signal having a first duty cycle and oscillating between a first logic state and a second logic state, said third terminal being coupled to said intermediate output node, said fourth terminal being coupled to said second power rail, said transistor being turned ON and moving the voltage potential at said third terminal toward said second power rail at a fixed rate in response to said oscillating signal being at said first logic state and being turned OFF and isolating said third terminal from said second power rail in response to said oscillating signal being at said second logic state; a duty cycle monitoring means including a logic inverter, a current starved inverter, a first constant current source having a first control current, and a second constant current source having a second control current, said logic inverter being responsive to said intermediate output node, the output of said logic inverter being coupled to said current starved inverter, said current starved inverter having a pull-up rate dependent on said first control current and having a pull-down rate dependent on said second control current, said current starved inverter being effective for producing a magnitude control output, the ratio of said first control current to said second control current being effective for establishing a predetermined second duty cycle at said intermediate output node; coupling means for coupling said magnitude control output to said first control input of said variable current source, said variable current source being effective for generating a current magnitude proportional to said magnitude control output and effective for moving the voltage potential of said intermediate output node toward said first power rail at a rate dependent on said current magnitude. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24)
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25. An oscillator with controlled duty cycle comprising:
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a first power rail and a second power rail; a variable current source having a first terminal, a second terminal, and a first control input, said first terminal being coupled to said first power rail, said second terminal being coupled to an intermediate output node; a first transistor having a third terminal, a fourth terminal, and a second control input, said third terminal being coupled to said intermediate output node; a first switching means having a fifth terminal and a sixth terminal, and further having a third control input for receiving an oscillating signal having a first duty cycle and oscillating between a first logic state and a second logic state, said fifth terminal being coupled to said fourth terminal of said first transistor, said sixth terminal being coupled to said second power rail, said first switching means being effective for closing and coupling said fifth terminal to said second power rail in response to said oscillating signal being at said first logic state and effective for opening and isolating said fifth terminal from said second power rail in response to said oscillating signal being at said second logic state; a duty cycle monitoring means for triggering a magnitude control output in response to said oscillating signal being at said first logic state, the triggering of said magnitude control output causing it to vary with time in a manner indicative of time, said magnitude control output being coupled to said second control input, said first transistor being effective for isolating said intermediate output node from said first switching means in response to said oscillating signal being at said first logic state for a predetermined amount of time; coupling means for coupling said magnitude control output to said first control input of said variable current source. - View Dependent Claims (26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39)
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Specification