Active inductor

• US 6,028,496 A
• Filed: 06/03/1998
• Issued: 02/22/2000
• Est. Priority Date: 12/08/1997
• Status: Expired due to Term

• Current Assignee: Samsung Electronics Co. Ltd. (Samsung Group)
• Original Assignee: Samsung Electronics Co. Ltd. (Samsung Group)
• Inventors: Ko, Jin-Su, Lee, Kwyro
• Primary Examiner(s): GENSLER, PAUL L
• Application Number:
  US09/090,047
• Time in Patent Office: 629 Days
• Field of Search: 333/214, 333/215, 330/85, 330/311
• US Class Current: 333/214
• CPC Class Codes: H03H 11/486 Simulating inductances using transconductance amplifiers
• CPC Class Codes: H03H 11/50 using gyrators

Abstract

An active inductor which consumes less direct current (DC) power and is stably biased, has a smaller number of bias pins, a higher quality factor (Q) and fewer controlling ports, than that of the prior art, is realized in metal semiconductor field effect transistor or bipolar transistor technology. The active inductor includes an inverting amplifier of a common source (common emitter) type, which inversely amplifies an input signal and outputs the amplified signal as an output signal, a non-inverting amplifier of a common gate (common base) cascode type, which non-inversely amplifies the output signal and the amplified signal as the input signal, a capacitor connected between the input signal and a reference signal, and a biasing portion for biasing the inverting amplifier and the non-inverting amplifier.

Claims

1. An active inductor having an output terminal comprising:

a common-source inverting amplifier for inversely amplifying an input signal applied to an input node and for providing an inversely-amplified output signal at an output node, the inverting amplifier having a parasitic capacitive effect between the input node and a reference signal;

the output node being directly coupled to the output terminal of the active inductor;

a common-gate cascode non-inverting amplifier for non-inversely amplifying the output signal applied to the output node and for providing a non-inversely amplified input signal at the input node; and

a biasing unit for biasing the inverting amplifier and the non-inverting amplifier.

2. The active inductor of claim 1, wherein the inverting and non-inverting amplifiers comprise:

a first transistor having a drain and a source which are coupled between the output node and the reference signal;

a second transistor having a drain and a source which are coupled between a first node and the output node;

a third transistor having a drain and a source which are connected between the input node and the first node; and

a second capacitor connected between the output node and a gate of the third transistor, and wherein the biasing unit supplies a bias signal to each gate of the first, second and third transistors.

3. The active inductor of claim 2, wherein the biasing unit comprises:

a fourth transistor having a drain and a source which are connected between a first supply voltage and the input node;

a third capacitor connected between the input node and a gate of the fourth transistor;

a first resistor having one end connected to the first supply voltage;

a second resistor connected between the other end of the first resistor and a gate of the fourth transistor;

a third resistor having one end connected to the other end of the first resistor;

a fourth resistor connected between the other end of the third resistor and the gate of the third transistor;

a fifth resistor having one end connected to the other end of the third resistor;

a sixth resistor connected between the other end of the fifth resistor and the gate of the second resistor;

a seventh resistor having one end connected to the other end of the fifth resistor;

an eighth resistor connected between the other end of the seventh resistor and the gate of the first transistor; and

a ninth resistor connected between the other end of the seventh resistor and a gate bias voltage.

4. The active inductor of claim 2 further comprising a control unit for varying the transconductances of the inverting amplifier and the non-inverting amplifier in response to an applied control signal, wherein the control unit comprises:

a tenth resistor having one end connected to the control signal;

a fifth transistor having a gate connected to the other end of the tenth resistor, and having a drain and a source which are connected between a second node and the reference signal;

a fifth capacitor connected between the gate of the second transistor and the second node;

a fourth capacitor connected between the gate of the first transistor and a third node; and

an eleventh resistor connected between the third node and the input node.

5. The active inductor of claim 1, further comprising a control unit for varying transconductances of the inverting amplifier and the non-inverting amplifier in response to an applied control signal.

6. The active inductor of claim 1, wherein the amplifiers are formed of semiconductor transistors selected from the list of transistor technologies consisting of metal semiconductor field effect transistors (MESFET), and metal oxide semiconductor field effect transistors (MOSFET).

7. The active inductor of claim 1 wherein the inverting amplifier comprises:

a first transistor having a drain and source which are coupled between the output node and a reference signal; and

wherein the non-inverting amplifier comprises

a second transistor having a drain and source which are connected between a first node and the output node; and

a third transistor having a drain and source which are coupled between the input node and the first node.

8. An active inductor having an output terminal comprising:

a common-emitter inverting amplifier for inversely amplifying an input signal applied to an input node and for providing an inversely-amplified output signal at an output node, the inverting amplifier having a parasitic capacitive effect between the input node and a reference signal, the output node being directly coupled to the output terminal of the active inductor;

a common-base cascode non-inverting amplifier for non-inversely amplifying the output signal applied to the output node and for providing a non-inversely amplified input signal at the input node; and

a biasing unit for biasing the inverting amplifier and the non-inverting amplifier.

9. The active inductor of claim 8, wherein the inverting and non-inverting amplifiers comprise:

a first transistor having a collector and an emitter which are connected between the output node and a first node;

a first resistor connected between the first node and the reference signal;

a second capacitor connected in parallel with the first resistor between the first node and the reference signal;

a second transistor having a collector and an emitter which are connected between a second node and the output node;

a third transistor having a collector and an emitter which are connected between the input node and the second node; and

a third capacitor connected between a base of the second transistor and the reference signal, wherein the biasing unit supplies a bias signal to each base of the first, second and third transistors.

10. The active inductor of claim 9, further comprising a control unit for controlling the level of bias signal in response to an applied control signal.

11. The active inductor of claim 10, wherein the biasing unit and the control unit comprise:

a second resistor having one end connected to the control signal;

a third resistor connected between the other end of the second resistor and the base of the third transistor;

a fourth resistor having one end connected to the base of the second transistor;

a fourth transistor having a base connected to the base of the third transistor, and having a collector and an emitter which are connected between the other end of the second resistor and the other end of the fourth resistor;

a fifth resistor having one end connected to the base of the first transistor;

a fifth transistor having a base connected to the base of the second transistor, and having a collector and an emitter which are connected between the other end of the fourth resistor and the other end of the fifth resistor;

a sixth resistor having one end connected to the reference signal;

a sixth transistor having a base connected to the base of the first transistor, and a collector and an emitter which are connected between the other end of the fifth resistor and the other end of the sixth resistor;

a seventh resistor connected between a supply voltage and the input signal;

a fourth capacitor connected between the output signal and a third node;

an eighth resistor connected between the third node and the base of the third transistor;

a fifth capacitor connected between the base of the first transistor and a fourth node; and

a ninth resistor connected between the fourth node and the input signal.

12. The active inductor of claim 11 wherein the control signal comprises the supply voltage.

13. The active inductor of claim 8, wherein the amplifiers are formed of bipolar junction transistors (BJT).

14. An active inductor comprising:

a common-source inverting amplifier for inversely amplifying an input signal applied to an input node and for providing an inversely-amplified output signal at an output node;

a common-gate cascode non-inverting amplifier for non-inversely amplifying the output signal applied to the output node and for providing a non-inversely amplified input signal at the input node;

a first parasitic capacitive effect between the input node and a reference signal; and

a biasing unit for biasing the inverting amplifier and the non-inverting amplifier;

wherein the inverting and non-inverting amplifiers comprise;

a first transistor having a drain and a source which are coupled between the output node and the reference signal;

a second transistor having a drain and a source which are coupled between a first node and the output node;

a third transistor having a drain and a source which are connected between the input node and the first node; and

a second capacitor connected between the output node and a gate of the third transistor;

wherein the biasing unit supplies a bias signal to each gate of the first, second and third transistors; and

wherein the biasing unit comprises;

a fourth transistor having a drain and a source which are connected between a first supply voltage and the input node;

a third capacitor connected between the input node and a gate of the fourth transistor;

a first resistor having one end connected to the first supply voltage;

a second resistor connected between the other end of the first resistor and a gate of the fourth transistor;

a third resistor having one end connected to the other end of the first resistor;

a fourth resistor connected between the other end of the third resistor and the gate of the third transistor;

a fifth resistor having one end connected to the other end of the third resistor;

a sixth resistor connected between the other end of the fifth resistor and the gate of the second resistor;

a seventh resistor having one end connected to the other end of the fifth resistor;

an eighth resistor connected between the other end of the seventh resistor and the gate of the first transistor; and

a ninth resistor connected between the other end of the seventh resistor and a gate bias voltage.

15. An active inductor comprising:

a common-source inverting amplifier for inversely amplifying an input signal applied to an input node and for providing an inversely-amplified output signal at an output node;

the common-source inverting amplifier comprising a first transistor having a drain and a source which are coupled between the output node and a reference signal;

a common gate cascode non-inverting amplifier for non-inversely amplifying the output signal applied to the output node and for providing a non-inversely amplified input signal at the input node;

the common-gate cascode non-inverting amplifier comprising;

a second transistor having a drain and a source which are coupled between a first node and the output node; and

a third transistor having a drain and a source which are coupled between the input node and the first node, a second capacitor being coupled between the output node and a gate of the third transistor;

a first parasitic capacitive effect between the input node and a reference signal;

a biasing unit for biasing the first, second, and third transistors; and

a control unit for varying transconductances of the inverting amplifier and the non-inverting amplifier in response to an applied control signal, the control unit comprising;

a tenth resistor having one end connected to the control signal;

a fifth transistor having a gate connected to the other end of the tenth resistor, and having a drain and a source which are connected between a second node and the reference signal;

a fifth capacitor connected between the gate of the second transistor and the second node;

a fourth capacitor connected between the gate of the first transistor and a third node; and

an eleventh resistor connected between the third node and the input signal.

16. An active inductor comprising:

a common-emitter inverting amplifier for inversely amplifying an input signal applied to an input node and for providing an inversely-amplified output signal at an output node;

a common base cascode non-inverting amplifier for non-inversely amplifying the output signal applied to the output node and for providing a non-inversely amplified input signal at the input node;

a first parasitic capacitive effect between the input node and a reference signal;

a biasing unit for biasing the inverting amplifier and the non-inverting amplifier; and

a control unit for controlling the level of bias signal in response to an applied control signal;

wherein the inverting and non-inverting amplifiers comprise;

a first transistor having a collector and an emitter which are connected between the output node and a first node;

a first resistor connected between the first node and the reference signal;

a second capacitor connected in parallel with the first resistor between the first node and the reference signal;

a second transistor having a collector and an emitter which are connected between a second node and the output node;

a third transistor having a collector and an emitter which are connected between the input node and the second node; and

a third capacitor connected between a base of the second transistor and the reference signal, wherein the biasing unit supplies a bias signal to each base of the first, second and third transistors; and

wherein the biasing unit and control unit comprise;

a second resistor having one end connected to the control signal;

a third resistor connected between the other end of the second resistor and the base of the third transistor;

a fourth resistor having one end connected to the base of the second transistor;

a fourth transistor having a base connected to the base of the third transistor, and having a collector and an emitter which are connected between the other end of the second resistor and the other end of the fourth resistor;

a fifth resistor having one end connected to the base of the first transistor;

a fifth transistor having a base connected to the base of the second transistor, and having a collector and an emitter which are connected between the other end of the fourth resistor and the other end of the fifth resistor;

a sixth resistor having one end connected to the reference signal;

a sixth transistor having a base connected to the base of the first transistor, and a collector and an emitter which are connected between the other end of the fifth resistor and the other end of the sixth resistor;

a seventh resistor connected between a supply voltage and the input signal;

a fourth capacitor connected between the output signal and a third node;

an eighth resistor connected between the third node and the base of the third transistor;

a fifth capacitor connected between the base of the first transistor and a fourth node; and

a ninth resistor connected between the fourth node and the input signal.

17. The active inductor of claim 16 wherein the control signal comprises the supply voltage.