Power efficient receiver

• US 6,028,887 A
• Filed: 06/26/1997
• Issued: 02/22/2000
• Est. Priority Date: 07/12/1996
• Status: Expired due to Term

• Current Assignee: General Electric Company
• Original Assignee: General Electric Company
• Inventors: Harrison, Daniel David, Tiemann, Jerome Johnson
• Primary Examiner(s): Pham, Chi H.
• Assistant Examiner(s): Tran, Khai
• Application Number:
  US08/883,419
• Time in Patent Office: 971 Days
• Field of Search: 325/206, 325/200, 325/202, 325/208, 325/209, 325/210, 455/343, 455/524, 455/38.3, 342/352, 342/357, 342/386, 701/213
• US Class Current: 375/147
• CPC Class Codes: G01S 19/29 carrier including Doppler, related G01S19/246 takes precedence
• CPC Class Codes: G01S 19/30 code related G01S19/246 takes precedence
• CPC Class Codes: G01S 19/34 Power consumption
• CPC Class Codes: G01S 19/37 Hardware or software details of the signal processing chain
• CPC Class Codes: G01S 19/42 Determining position
• CPC Class Codes: G01S 5/0027 of actual mobile position, i.e. position determined on mobile
• CPC Class Codes: G01S 5/0036 of measured values, i.e. measurement on mobile and position calculation on base station
• CPC Class Codes: G01S 5/0054 of actual mobile position, i.e. position calculation on base station
• CPC Class Codes: G06F 17/15 Correlation function computation including computation of convolution operations arithmetic circuits for sum of products per se, e.g. multiply-accumulators G06F7/5443; digital filters, e.g. FIR, IIR, adaptive filters H03H17/00
• CPC Class Codes: H04B 1/707 using direct sequence modulation
• CPC Class Codes: H04B 1/708 Parallel implementation
• CPC Class Codes: H04B 1/71075 Parallel interference cancellation
• CPC Class Codes: H04B 2201/70709 with discontinuous detection
• CPC Class Codes: Y02D 30/70 in wireless communication networks

Abstract

A direct sequence spread spectrum receiver samples an incoming signal and stores the sample in memory. Power is then inhibited to the tuner of the receiver to minimize power consumption. The signal sample may be read from memory when necessary to process the signal without further signal acquisition. Power to other receiver sections may be selectively controlled to minimize power consumption. Such a receiver is useful in global positioning satellite (GPS) signal processing where the receiver has a limited power supply.

Claims

1. In a receiver, apparatus comprising:

a power supply;

a tuner for receiving a signal;

a memory for storing a digital representation of said signal received by said tuner;

a converter for converting the signal received by said tuner into said digital representation for storage in said memory;

processing circuitry for processing said digital representation, and including a parallel correlator for comparing said digital representation with a replica signal; and

a controller responsive to said processing circuitry for controlling application of power from said power supply to said tuner, said controller being adapted to cause power to be applied to said tuner until said digital representation is stored in said memory and to cause power to be selectively inhibited to said tuner thereafter.

2. The receiver of claim 1, wherein:

said parallel correlator comprises a plurality of correlator stages for simultaneously correlating corresponding samples of the stored digital representation and said replica signal, and for producing a plurality of respective output signals.

3. The receiver of claim 2, wherein:

said parallel correlator further comprises a summer for summing said plurality of output signals to produce a correlation result.

4. The receiver of claim 3, wherein:

said parallel correlator further comprises converters for converting said plurality of output signals to analog form prior to summation by said summer; and

said summer comprises an analog summer.

5. The receiver of claim 4, wherein:

said summer comprises charge summation means.

6. The receiver of claim 1, further comprising:

a transmitter for transmitting a receiver output signal produced by said receiver to a remote location.

7. The receiver of claim 6, wherein:

said controller is adapted to selectively cause said transmitter to transmit said receiver output signal.

8. The receiver of claim 1, further comprising:

a squarer coupled to the output of said parallel correlator;

a non-coherent accumulator for summing output signals of said squarer; and

a threshold detector coupled to said non-coherent accumulator for supplying a command signal to said controller in response to an output signal from said squarer in excess of a threshold level.

9. The receiver of claim 8 wherein said parallel correlator includes a coherent accumulator for providing output signals from said parallel correlator, said squarer being coupled to said coherent accumulator for receiving said correlator output signals from said parallel correlator.

10. A GPS receiver, comprising:

a power supply;

a tuner for receiving a time segment of a GPS signal;

a memory coupled to said tuner for storing a representation of said time segment received by said tuner;

a replica generator for generating a replica signal;

a parallel correlator coupled to said memory and to said replica generator for comparing said representation of said time segment and said replica signal to identify said GPS signal; and

a controller responsive to said parallel correlator for controlling application of power from said power supply to said tuner and for controlling storage of said representation in said memory, said controller being adapted to cause power to be applied to said tuner until said representation of said time segment is stored in said memory and to cause power to be selectively inhibited to said tuner thereafter.

11. The GPS receiver of claim 10, further comprising:

a squarer coupled to the output of said parallel correlator;

a non-coherent accumulator for summing output signals of said squarer; and

a threshold detector coupled to said non-coherent accumulator for supplying a command signal to said controller in response to an output signal from said squarer in excess of a threshold level.

12. The receiver of claim 11 wherein said parallel correlator includes a coherent accumulator for providing output signals from said parallel correlator, said squarer being coupled to said coherent accumulator for receiving said output signals from said parallel correlator.

13. The receiver of claim 12, wherein:

said replica generator comprises a code generator and at least one of a Doppler offset generator and a code offset generator for generating a replica signal;

said parallel correlator being adapted to correlate samples of said representation of said time segment and said replica signal simultaneously to produce a correlation result.

14. The receiver of claim 13, wherein:

said parallel correlator comprises a plurality of multipliers for simultaneously multiplying corresponding samples of said representation of said time segment and said replica signal to produce a plurality of multiplier results; and

a summer for simultaneously summing said plurality of multiplier results to produce said correlation result.

15. The receiver of claim 14, wherein:

said parallel correlator further comprises converters for converting said plurality of multiplier results to analog form prior to summation by said summer, said summer comprising an analog summer.

16. The receiver of claim 15, wherein:

said summer comprises charge summation means.

17. The receiver of claim 12, further comprising:

a transmitter for selectively transmitting an output signal produced by said receiver to a remote location.

18. The receiver of claim 12, wherein:

said controller is adapted to selectively enable said parallel correlator to produce said result.

19. The receiver of claim 12, wherein:

said replica generator is adapted to generate additional replica signals symbolizing satellite code--Doppler bin combinations; and

wherein

said parallel correlator is adapted to receive said representation of said time segment from said memory for correlation with said additional replica signals.

20. In a receiver, apparatus comprising:

a power supply;

a tuner for receiving a signal;

a memory coupled to said tuner for storing a digital representation of said signal received by said tuner;

processing circuitry for processing said digital representation, said processing circuitry including a replica generator for generating a replica signal, and a parallel correlator for comparing said digital representation with the replica signal; and

a controller responsive to said processing circuitry for controlling application of power from said power supply to said tuner, said controller being adapted to cause power to be applied to said tuner until said digital representation is stored in said memory and to cause power to be selectively inhibited to said tuner thereafter.