×

Electroless gold plating method for forming inductor structures

  • US 6,030,877 A
  • Filed: 10/06/1997
  • Issued: 02/29/2000
  • Est. Priority Date: 10/06/1997
  • Status: Expired due to Term
First Claim
Patent Images

1. A method of fabricating a gold containing integrated wiring structure for an integrated circuit comprising:

  • a) forming a first insulating layer over a substrate;

    b) forming a barrier layer containing nickel using an electroless deposition process over said first insulating layer;

    c) forming a gold conductor layer using an electroless deposition process over said barrier layer;

    said gold conductor layer and said barrier layer comprise a first conductor layer;

    d) forming a planarization layer over said gold conductor layer;

    e) forming a core metal layer composed of Fe--Co alloy using an electroless deposition process over the planarization layer;

    said core metal layer is formed by an electroless plating process having a solution comprising;

    KAu(CN)2 with a concentration between about 4 and 6 g/L, KCN with a concentration between about 7 and 9 g/L, NaOH with a concentration between about 18 and 22 g/L, Na2 EDTA with a concentration between about 13 and 17 g/L, NaBH4 with a concentration between about 23 and 27 g/L, and at a temperature between about 87 and 93°

    C.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×