Apparatus and method for defect testing of integrated circuits

• US 6,031,386 A
• Filed: 10/31/1997
• Issued: 02/29/2000
• Est. Priority Date: 10/31/1997
• Status: Expired due to Term

• Current Assignee: National Technology & Engineering Solutions Of Sandia LLC (Honeywell International Inc.)
• Original Assignee: Sandia Corporation (Martin Marietta Corporation)
• Inventors: Soden, Jerry M., Cole, Edward I. Jr.
• Primary Examiner(s): Ballato, Josie
• Assistant Examiner(s): TANG, MINH NHUT
• Application Number:
  US08/962,465
• Time in Patent Office: 851 Days
• Field of Search: 324/73.1, 324/158.1, 324/765, 324/103 R, 324/758, 714/724, 714/733, 714/25
• US Class Current: 324/762.02
• CPC Class Codes: G01R 31/3004 Current or voltage test

Abstract

An apparatus and method for defect and failure-mechanism testing of integrated circuits (ICs) is disclosed. The apparatus provides an operating voltage, V_DD, to an IC under test and measures a transient voltage component, V_DDT, signal that is produced in response to switching transients that occur as test vectors are provided as inputs to the IC. The amplitude or time delay of the V_DDT signal can be used to distinguish between defective and defect-free (i.e. known good) ICs. The V_DDT signal is measured with a transient digitizer, a digital oscilloscope, or with an IC tester that is also used to input the test vectors to the IC. The present invention has applications for IC process development, for the testing of ICs during manufacture, and for qualifying ICs for reliability.

Claims

1. An apparatus for defect or failure-mechanism testing of an integrated circuit (IC), comprising:

(a) a source connected to a power supply terminal of the IC to provide an operating voltage thereto;

(b) means connected to a plurality of input pins of the IC for providing a vector set of voltage inputs to the IC for toggling the IC between logic states thereof; and

(c) means connected to the power supply terminal of the IC for measuring a transient voltage component (V_DDT) generated in response to the toggling of the IC between logic states thereof, with the transient voltage component providing an indication of any defects or failure-mechanisms present within the IC.

2. The apparatus of claim 1 wherein the source comprises a voltage source.

3. The apparatus of claim 2 wherein the voltage source comprises a constant voltage source.

4. The apparatus of claim 1 wherein the source comprises a current source.

5. The apparatus of claim 4 wherein the current source comprises a constant current source.

6. The apparatus of claim 5 wherein the constant current source provides more current to the IC than required for a defect-free IC.

7. The apparatus of claim 1 wherein the means for providing the vector set of voltage inputs to the IC comprises an integrated circuit tester.

8. The apparatus of claim 7 wherein the means for measuring the transient voltage component of the operating voltage is the integrated circuit tester.

9. The apparatus of claim 1 wherein the means for measuring the transient voltage component of the operating voltage is a transient digitizer.

10. The apparatus of claim 1 wherein the means for measuring the transient voltage component of the operating voltage is a digital oscilloscope.

11. The apparatus of claim 1 wherein the means for measuring the transient voltage component of the operating voltage includes an amplifier.

12. The apparatus of claim 11 wherein the amplifier is an alternating-current (ac) amplifier.

13. The apparatus of claim 1 wherein the means for measuring the transient voltage component of the operating voltage includes means for repeatedly measuring and averaging the transient voltage component in response to cycling of the means for providing the vector set of voltage inputs to the IC.

14. The apparatus of claim 1 wherein the vector set of voltage inputs to the IC comprises selected test vectors.

15. The apparatus of claim 1 wherein the IC is a complementary metal-oxide semiconductor (CMOS) IC.

16. A method for testing an integrated circuit (IC) and locating any defects or failure-mechanisms therein, comprising steps for:

(a) providing an operating voltage (V_DD) to the IC;

(b) toggling the IC between logic states thereof by providing a vector set of voltage inputs to input pins of the IC;

(c) measuring a transient voltage component (V_DDT) of the operating voltage generated in response to toggling of the IC between logic states thereof; and

(d) identifying ICs having defects or failure-mechanisms therein by determining whether the transient voltage component (V_DDT) exceeds a known value.

17. The method of claim 16 wherein the step for providing the operating voltage is performed by using a constant voltage source.

18. The method of claim 16 wherein the step for providing the operating voltage is performed by using a constant current source.

19. The method of claim 18 further including a step for providing more current to the IC than required for a defect-free and faliure-mechanism-free IC.

20. The method of claim 16 wherein the step for toggling the IC between logic states thereof comprises providing the vector set of voltage inputs with an integrated circuit tester.

21. The method of claim 20 wherein the step for measuring the transient voltage component of the operating voltage comprises measuring the transient voltage component with the integrated circuit tester.

22. The method of claim 16 wherein the step for measuring the transient voltage component of the operating voltage comprises measuring the transient voltage component with a transient digitizer.

23. The method of claim 16 wherein the step for measuring the transient voltage component of the operating voltage comprises measuring the transient voltage component with a digital oscilloscope.

24. The method of claim 16 wherein the step for measuring the transient voltage component of the operating voltage comprises averaging multiple measurements of the transient voltage component.

25. The method of claim 16 wherein the known value is derived from at least one defect-free and failure-mechanism-free IC.

26. The method of claim 16 wherein the known value is derived from modeling electrical characteristics of the IC.

27. The method of claim 16 wherein the step for measuring the transient voltage component further includes a step for amplifying the transient voltage component.

28. The method of claim 27 wherein the step for amplifying the transient voltage component comprises amplifying the transient voltage component with an alternating-current (ac) amplifier.

29. The method of claim 16 wherein the IC is a complementary metal-oxide semiconductor (CMOS) IC.

30. A method for testing an integrated circuit (IC) and locating any defects or failure-mechanisms therein, comprising steps for:

(a) providing an operating voltage (V_DD) to the IC;

(b) toggling the IC between logic states thereof by providing a vector set of voltage inputs to input pins of the IC;

(c) measuring a time delay in a transient voltage component (V_DDT) of the operating voltage generated in response to toggling of the IC between logic states thereof; and

(d) identifying ICs having defects or failure-mechanisms therein by determining whether the time delay exceeds a known value of time delay.

31. The method of claim 30 wherein the step for providing the operating voltage is performed by using a constant voltage source.

32. The method of claim 30 wherein the step for providing the operating voltage is performed by using a constant current source.

33. The method of claim 32 further including a step for providing more current to the IC than required for a defect-free and failure-mechanism-free IC.

34. The method of claim 30 wherein the step for toggling the IC between logic states thereof comprises providing the vector set of voltage inputs with an integrated circuit tester.

35. The method of claim 34 wherein the step for measuring the time delay comprises measuring the time delay with the integrated circuit tester.

36. The method of claim 30 wherein the step for measuring the time delay comprises measuring the time delay with an integrated circuit tester.

37. The method of claim 30 wherein the step for measuring the time delay comprises measuring the time delay with a transient digitizer.

38. The method of claim 30 wherein the step for measuring the time delay comprises measuring the time delay with a digital oscilloscope.

39. The method of claim 30 wherein the step for measuring the time delay comprises averaging multiple measurements of the time delay.

40. The method of claim 30 wherein the known value of time delay is derived from at least one defect-free and failure-mechanism-free IC.

41. The method of claim 30 wherein the known value of time delay is derived from modeling electrical characteristics of the IC.

42. The method of claim 30 wherein the step of identifying ICs having defects or failure-mechanisms therein further includes a step for qualifying ICs as being defect-free and failure-mechanism-free if the time delay is less than the known value of time delay.

43. The method of claim 30 wherein the step for measuring a time delay in the transient voltage component further includes a step for amplifying the transient voltage component.

44. The method of claim 42 wherein the step for amplifying the transient voltage component comprises amplifying the transient voltage component with an alternating-current (ac) amplifier.

45. The method of claim 30 wherein the IC is a complementary metal-oxide semiconductor (CMOS) IC.