Solid state microanemometer

• US 6,032,527 A
• Filed: 07/01/1998
• Issued: 03/07/2000
• Est. Priority Date: 07/01/1998
• Status: Expired due to Term

• Current Assignee: Memsys Incorporated
• Original Assignee: Memsys Incorporated
• Inventors: Tsuei, Timothy W., Genova, Perry A.
• Primary Examiner(s): OEN, WILLIAM L
• Application Number:
  US09/108,894
• Time in Patent Office: 615 Days
• Field of Search: 73/204.26, 73/204.25, 73/170.12, 73/861.85
• US Class Current: 73/204.26
• CPC Class Codes: G01F 1/6845 Micromachined devices

Abstract

A solid state microanemometer is micromachined from a bonded silicon wafer comprising two silicon layers. The microanemometer comprises a first semiconductor wafer doped with an impurity having an upper planar surface and a lower planar surface with a peripheral edge; and a second semiconductor wafer bonded to the first semiconductor wafer having an upper planar surface; a lower surface; and a cavity having a peripheral edge and a peripheral margin defined on the upper planar surface and bounded by the peripheral edge of the cavity wherein the lower planar surface of the first semiconductor is bonded to the peripheral margin of the cavity so as to at least partially close the cavity wherein 0.025 to 99% of the peripheral edge of the lower planar surface of the first semiconductor overlaps with the peripheral edge of the cavity.

Claims

1. A microanemometer comprising:

a) an electrically conductive resistor in the form of a first semiconductor wafer doped with an impurity having

1) an upper substantially planar surface;

2) a lower substantially planar surface having a peripheral edge;

b) a second semiconductor wafer bonded to the first semiconductor wafer having

1) an upper substantially planar surface;

2) a lower surface;

3) a cavity having a peripheral edge and a peripheral margin defined on the upper planar surface and bounded by the peripheral edge of the cavity wherein the lower planar surface of the first semiconductor is bonded to the peripheral margin of the cavity so as to at least partially close the cavity wherein 0.025 to 99% of peripheral edge of the lower planar surface of the first semiconductor overlaps with the peripheral edge of the cavity; and

c) a means for electrically connecting the resistor to a current source.

2. A microanemometer according to claim 1 wherein the upper planar surface of the first semiconductor is smaller than the lower planar surface of the first semiconductor.

3. A microanemometer according to claim 1 further comprising an oxide layer wherein the lower planar surface of the first semiconductor is bonded to the peripheral margin of the cavity by an oxide layer residing between the lower planar surface of the first semiconductor and the peripheral margin.

4. A microanemometer according to claim 3 wherein the oxide layer has a thickness of about 1 micron.

5. A microanemometer according to claim 3 wherein the oxide layer comprises Silicon oxide.

6. A microanemometer according to claim 1 wherein the first semiconductor has height of about 10 to 50 microns.

7. A microanemometer according to claim 1 wherein the first semiconductor has height of about 20 microns.

8. A microanemometer according to claim 1 wherein the first semiconductor has lateral dimensions of about 1.4 mm by about 0.8 mm.

9. A microanemometer according to claim 1 wherein the second semiconductor has height of about 250 to 400 microns.

10. A microanemometer according to claim 9 wherein the second semiconductor has height of about 300 microns.

11. A microanemometer according to claim 1 wherein the first semiconductor comprises silicon doped with a n+ deep level impurity.

12. A microanemometer according to claim 1 wherein the means for electrically connecting the resistor to a current source comprises two metal lines connected to the upper surface of the first semiconductor.

13. A microanemometer according to claim 12 further comprising two pads wherein the two pads are connected respectively to the two metal lines.

14. A microanemometer according to claim 13 further comprising two through-wafer holes wherein the two pads are respectively backed by the through-wafer holes filled with electroplated metal.

15. A microanemometer according to claim 14 wherein the electroplated metal filling the through-wafer holes protrude from their respective through-wafer holes at least 20 microns.

16. A microanemometer according to claim 14 wherein a sidewall oxide layer coats the interior of each of the through-wafer holes.

17. A microanemometer according to claim 1 further comprising a passivation layer wherein the passivation layer covers the upper surface of the first semiconductor wafer and the upper surface of the second semiconductor wafer.

18. A microanemometer according to claim 17 wherein the passivation layer comprises nitride.

19. A microanemometer according to claim 1 wherein at least two opposing edges of the peripheral edge of the cavity are covered by the lower planar surface of the first semiconductor.

20. A microanemometer according to claim 1 wherein the first semiconductor comprises four corners and at least two of the four corners overlap with the peripheral edge of the cavity.

21. A microanemometer comprising:

d) an electrically conductive resistor in the form of a semiconductor wafer doped with an impurity having

1) an upper surface;

2) a lower surface having a peripheral edge;

e) a substrate bonded to the semiconductor wafer having

1) an upper surface;

2) a cavity having a peripheral edge and a peripheral margin defined on the upper surface and bounded by the peripheral edge of the cavity wherein the lower surface of the semiconductor wafer rests on and is supported by at least part of the peripheral edge of the cavity such that the semiconductor wafer is over the cavity; and

f) a means for electrically connecting the resistor to a current source.

22. A microanemometer according to claim 21 wherein the substrate is a semiconductor wafer.

23. A microanemometer according to claim 21 which further comprises two metal lines connected to the upper surface of the semiconductor wafer.

24. A microanemometer according to claim 23 further comprising two pads wherein the two pads are connected respectively to the two metal lines.

25. A microanemometer according to claim 24 further comprising at least one through-wafer hole at least one pad is backed by a through-wafer hole filled with electroplated metal.

26. A microanemometer according to claim 25 wherein the electroplated metal filling the through-wafer holes protrude from their respective through-wafer holes at least 20 microns.