Solid state microanemometer
First Claim
1. A microanemometer comprising:
- a) an electrically conductive resistor in the form of a first semiconductor wafer doped with an impurity having1) an upper substantially planar surface;
2) a lower substantially planar surface having a peripheral edge;
b) a second semiconductor wafer bonded to the first semiconductor wafer having1) an upper substantially planar surface;
2) a lower surface;
3) a cavity having a peripheral edge and a peripheral margin defined on the upper planar surface and bounded by the peripheral edge of the cavity wherein the lower planar surface of the first semiconductor is bonded to the peripheral margin of the cavity so as to at least partially close the cavity wherein 0.025 to 99% of peripheral edge of the lower planar surface of the first semiconductor overlaps with the peripheral edge of the cavity; and
c) a means for electrically connecting the resistor to a current source.
2 Assignments
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Accused Products
Abstract
A solid state microanemometer is micromachined from a bonded silicon wafer comprising two silicon layers. The microanemometer comprises a first semiconductor wafer doped with an impurity having an upper planar surface and a lower planar surface with a peripheral edge; and a second semiconductor wafer bonded to the first semiconductor wafer having an upper planar surface; a lower surface; and a cavity having a peripheral edge and a peripheral margin defined on the upper planar surface and bounded by the peripheral edge of the cavity wherein the lower planar surface of the first semiconductor is bonded to the peripheral margin of the cavity so as to at least partially close the cavity wherein 0.025 to 99% of the peripheral edge of the lower planar surface of the first semiconductor overlaps with the peripheral edge of the cavity.
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Citations
26 Claims
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1. A microanemometer comprising:
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a) an electrically conductive resistor in the form of a first semiconductor wafer doped with an impurity having 1) an upper substantially planar surface; 2) a lower substantially planar surface having a peripheral edge; b) a second semiconductor wafer bonded to the first semiconductor wafer having 1) an upper substantially planar surface; 2) a lower surface; 3) a cavity having a peripheral edge and a peripheral margin defined on the upper planar surface and bounded by the peripheral edge of the cavity wherein the lower planar surface of the first semiconductor is bonded to the peripheral margin of the cavity so as to at least partially close the cavity wherein 0.025 to 99% of peripheral edge of the lower planar surface of the first semiconductor overlaps with the peripheral edge of the cavity; and c) a means for electrically connecting the resistor to a current source. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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21. A microanemometer comprising:
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d) an electrically conductive resistor in the form of a semiconductor wafer doped with an impurity having 1) an upper surface; 2) a lower surface having a peripheral edge; e) a substrate bonded to the semiconductor wafer having 1) an upper surface; 2) a cavity having a peripheral edge and a peripheral margin defined on the upper surface and bounded by the peripheral edge of the cavity wherein the lower surface of the semiconductor wafer rests on and is supported by at least part of the peripheral edge of the cavity such that the semiconductor wafer is over the cavity; and f) a means for electrically connecting the resistor to a current source. - View Dependent Claims (22, 23, 24, 25, 26)
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Specification