Process for reducing copper oxide during integrated circuit fabrication
First Claim
Patent Images
1. A method for reducing the amount of copper oxide formed over a surface of copper on a semiconductor wafer, the method comprising the steps of:
- placing the semiconductor wafer in a gap between a pair of electrodes arranged within a reaction chamber;
establishing a flow of H2 gas through said reaction chamber;
adjusting the pressure within said reaction chamber to a pressure within the range of about 0.4 Torr to about 1.2 Torr; and
applying RF power between the pair of electrodes for selectively etching said copper oxide from said surface of copper on said semiconductor wafer.
1 Assignment
0 Petitions
Accused Products
Abstract
A method of integrated circuit fabrication creating copper interconnect structures wherein the formation of copper oxide is reduced or eliminated by etching away the copper oxide performing an H2 plasma treatment in a plasma enhanced chemical vapor deposition chamber.
116 Citations
18 Claims
-
1. A method for reducing the amount of copper oxide formed over a surface of copper on a semiconductor wafer, the method comprising the steps of:
-
placing the semiconductor wafer in a gap between a pair of electrodes arranged within a reaction chamber; establishing a flow of H2 gas through said reaction chamber; adjusting the pressure within said reaction chamber to a pressure within the range of about 0.4 Torr to about 1.2 Torr; and applying RF power between the pair of electrodes for selectively etching said copper oxide from said surface of copper on said semiconductor wafer. - View Dependent Claims (2, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18)
-
-
3. The method according to clam 1 further comprising the step of adjusting the gap between the pair of electrodes to about 700 millimeters wherein said gap adjusting step precedes applying RF power between the pair or electrodes.
Specification