Semiconductor integrated circuit device provided with a differential amplifier

• US 6,034,567 A
• Filed: 02/26/1998
• Issued: 03/07/2000
• Est. Priority Date: 02/27/1997
• Status: Expired due to Term

• Current Assignee: Toshiba Memory Corporation (Kioxia Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Sudo, Ryo, Arai, Norihisa, Umezawa, Akira, Atsumi, Shigeru, Banba, Hironori
• Primary Examiner(s): Pascal, Robert
• Assistant Examiner(s): Nguyen, Patricia T.
• Application Number:
  US09/030,776
• Time in Patent Office: 740 Days
• Field of Search: 330/253, 330/257, 330/261, 330/307
• US Class Current: 330/253
• CPC Class Codes: H03F 3/45479 characterised by the way of common mode signal rejection

Abstract

A differential amplifier comprises an n-channel MOS transistor to the gate of which an input voltage VIN1 is fed, and an n-channel MOS transistor to the gate of which an input voltage VIN2 is fed. A p-channel MOS transistor arranged in such a manner that, to the source thereof, a power source voltage Vcc is fed, and the gate and drain thereof are connected to the drain of the MOS transistor, and a p-channel MOS transistor arranged in such a manner that the gate thereof is connected to the drain of the MOS transistor, the drain thereof is connected to the drain of the MOS transistor, and the voltage at this drain is outputted as an output voltage VOUT, and the output current I of a constant-current source is set so that the transistors constituting a differential amplifier may operate in a weak inversion zone.

Claims

1. A semiconductor integrated circuit device provided with a differential amplifier, said differential amplifier comprising:

first and second first conductivity type MOS transistors to respective gates of which input signals are fed, said first and second transistors constituting a differential pair; and

third and fourth second conductivity type MOS transistors, drains of which are connected to drains of said first and second first conductivity type MOS transistors, respectively said third and fourth transistors constituting a load transistor pair with respect to said differential pair,

an output signal being delivered through one of a node between said first MOS transistor and said third MOS transistor and a node between said second MOS transistor and said fourth MOS transistor,

wherein said first, second, third and fourth MOS transistors are made to operate in a weak inversion region.

2. The semiconductor integrated circuit device provided with a differential amplifier according to claim 1, wherein said third and fourth second conductivity type MOS transistors are arranged in such a manner that gates thereof are connected in common to the other one of the node between said first MOS transistor and said third MOS transistor and the node between said second MOS transistor and said fourth MOS transistor, and thus constitute a current mirror circuit.

15. The semiconductor integrated circuit device provided with a differential amplifier according to claim 1, further comprising:

a first resistor arranged in such a manner that the output signal of said differential amplifier is fed to one end thereof, and a voltage at said one end is outputted as a reference voltage;

a first diode arranged in such a manner that an anode thereof is connected to another end of said first resistor, while to a cathode thereof, a predetermined voltage is fed, and a voltage at said anode is fed as said input signal to the gate of one of said first and second MOS transistors;

a second resistor one end of which is connected to the one end of said first resistor;

a third resistor arranged in such a manner that one end thereof is connected to another end of said second resistor, and a voltage at said one end is fed as said input signal to the gate of the other one of said first and second MOS transistors; and

a second diode arranged in such a manner that an anode thereof is connected to another end of said third resistor, while to a cathode thereof, said predetermined voltage is fed;

wherein said device constitutes a reference voltage generation circuit.

17. The semiconductor integrated circuit device provided with a differential amplifier according to claim 15, wherein the output signal of said differential amplifier is fed through a drain of a fifth second conductivity MOS transistor having a gate connected to the one of the node between said first MOS transistor and said third MOS transistor and the node between said second MOS transistor and said fourth MOS transistor, and to a source thereof, a first voltage applied to a source of said third MOS transistor and a source of said fourth MOS transistor is fed.

19. The reference voltage generation circuit according to claim 15, wherein said first and second MOS transistors are comprised of intrinsic MOS transistors.

21. The semiconductor integrated circuit device provided with a differential amplifier according to claim 15, wherein a power supply voltage is fed through a low-pass filter.

25. The semiconductor integrated circuit device provided with a differential amplifier according to claim 15, wherein, among a wiring group consisting of wirings connected to sources, drains or gates of said respective MOS transistors, wirings connected to the one end or the other end of each of said respective resistors, wirings connected to the anodes or cathodes of said respective diodes, or wirings which connect elements constituting a constant-current source with each other, at both sides of at least part of a wiring which is not fed with a power source voltage and not grounded, there are provided wirings which are grounded.

26. The semiconductor integrated circuit device provided with a differential amplifier according to claim 15, wherein, among a wiring group consisting of wirings connected to sources, drains or gates of said respective MOS transistors, wirings connected to the one end or the other end of each of said respective resistors, wirings connected to the anodes or cathodes of said respective diodes, or wiring which connect elements constituting a constant-current source with each other, at a location where a wiring which is not fed with a power source voltage and not grounded, intersects a power source wiring which is fed with the power source voltage, a wiring which is grounded is provided between said power source wiring and said intersecting wiring.

27. The semiconductor integrated circuit device provided with a differential amplifier, said differential amplifier according to claim 1, further comprising;

a booster circuit to which a booster circuit activating signal is fed, said booster circuit outputting a boosted voltage;

a voltage dropping circuit to which said boosted voltage is fed, said voltage dropping circuit outputting a voltage obtained by dropping said boosted voltage at a fixed ratio; and

a control circuit which generates said booster circuit activating signal in response to the output signal from said differential amplifier.

28. The semiconductor integrated circuit device provided with a differential amplifier, according to claim 15, further comprising:

a memory cell array comprising a plurality of memory cells arranged in a matrix;

wherein a voltage other than an external power source voltage fed to each node of said memory cells is generated on the basis of an output voltage from said reference voltage generation circuit.

3. A semiconductor integrated circuit device provided with a differential amplifier, said differential amplifier comprising:

a first conductivity type MOS transistor to a gate of which a first input voltage is fed;

a second first conductivity type MOS transistor to a gate of which a second input voltage is fed;

a third second conductivity type MOS transistor arranged in such a manner that, to a source thereof, a first voltage is fed, and a gate and a drain thereof are connected to a drain of said first MOS transistor; and

a fourth second conductivity type MOS transistor arranged in such a manner that, to a source thereof, said first voltage is fed, and a gate thereof is connected to the drain of said first MOS transistor, while a drain thereof is connected to a drain of said second MOS transistor, and a voltage at the drain of said fourth MOS transistor is outputted as an output voltage,

wherein said first and second MOS transistors and said third and fourth MOS transistors are made to operate in a weak inversion region.

4. The semiconductor integrated circuit device provided with a differential amplifier according to claim 3, further including a constant-current source arranged in such a manner that one end thereof is connected to a source of said first MOS transistor and a source of said second MOS transistor, while, to another end thereof, a second voltage is fed, and said constant-current source outputting a current with which said first and second MOS transistors and said third and fourth MOS transistors operate in the weak inversion region.

5. The semiconductor integrated circuit device provided with a differential amplifier according to claim 4, wherein said constant-current source comprises:

a first constant-current source to one end of which said second voltage is fed;

a fifth second conductivity type MOS transistor arranged in such a manner that, to a source thereof, said first voltage is fed, and a gate and a drain thereof are connected to another end of said first constant-current source;

a sixth second conductivity type MOS transistor arranged in such a manner that, to a source thereof, said first voltage is fed, and a gate thereof is connected to the other end of said first constant-current source;

a seventh first conductivity MOS transistor arranged in such a manner that a gate and a drain thereof are connected to a drain of said sixth MOS transistor, and, to a source thereof, said second voltage is fed; and

an eighth first conductivity type MOS transistor arranged in such a manner that a gate thereof is connected to the drain of said sixth MOS transistor, and a drain thereof is connected to the source of said first MOS transistor and the source of said second MOS transistor, and to the source thereof, said second voltage is fed.

6. The semiconductor integrated circuit device provided with a differential amplifier according to claim 4, wherein said constant-current source comprises:

a first constant-current source to one end of which said first voltage is fed;

a fifth first conductivity type MOS transistor arranged in such a manner that a gate and drain thereof are connected to another end of said first constant-current source, and to a source thereof, said second voltage is fed; and

a sixth first conductivity type MOS transistor arranged in such a manner that a gate thereof is connected to the other end of said first constant-current source, a drain thereof is connected to the source of said first MOS transistor and the source of said second MOS transistor, and to source thereof, said second voltage is fed.

7. The semiconductor integrated circuit device provided with a differential amplifier according to claim 5, wherein said first constant-current source comprises:

a ninth second conductivity type MOS transistor arranged in such a manner that, to a source thereof, said first voltage is fed, and a gate thereof is connected to the drain of said fifth MOS transistor;

a tenth first conductivity type MOS transistor arranged in such a manner that a gate and a drain thereof are connected to a drain of said ninth MOS transistor;

a diode arranged in such a manner that an anode thereof is connected to a source of said tenth MOS transistor, while to a cathode thereof, said second voltage is fed;

an eleventh first conductivity type MOS transistor arranged in such a manner that a gate thereof is connected to the gate of said tenth MOS transistor, and a drain thereof is connected to the drain of said fifth MOS transistor; and

a resistor arranged in such a manner that one end thereof is connected to a source of said eleventh MOS transistor, and, to another end thereof, said second voltage is fed.

8. The semiconductor integrated circuit device provided with a differential amplifier according to claim 4, wherein said constant-current source comprises:

a fifth second conductivity type MOS transistor to a source of which said first voltage is fed;

a sixth first conductivity type MOS transistor a gate and a drain of which are connected to a drain of said fifth MOS transistor;

a diode arranged in such a manner that an anode thereof is connected to a source of said sixth MOS transistor, and to a cathode thereof, said second voltage is fed;

a seventh second conductivity type MOS transistor arranged in such a manner that, to a source thereof, said first voltage is fed, and a gate and a drain thereof are connected to a gate of said fifth MOS transistor;

an eighth first conductivity type MOS transistor arranged in such a manner that a drain thereof is connected to the drain of said seventh MOS transistor, and a gate of said eighth MOS transistor is connected to the gate of said sixth MOS transistor;

a resistor arranged in such a manner that one end thereof is connected to a source of said eighth MOS transistor, and, to another end thereof, said second voltage is fed; and

a ninth first conductivity type transistor arranged in such a manner that a gate thereof is connected to the gate of said eighth MOS transistor, a drain thereof is connected to the source of said first MOS transistor and the source of said second MOS transistor, and, to a source thereof, said second voltage is fed.

9. The semiconductor integrated circuit device provided with a differential amplifier according to claim 4, wherein said constant-current source comprises:

a fifth second conductivity type MOS transistor to a source of which said first voltage is fed;

a sixth first conductivity type MOS transistor a gate and a drain of which are connected to a drain of said fifth MOS transistor;

a seventh first conductivity type MOS transistor arranged in such a manner that a gate and drain thereof are connected to a source of said sixth MOS transistor, and, to a source thereof, said second voltage is fed;

an eighth second conductivity type MOS transistor arranged in such a manner that a gate and a drain thereof are connected to the source of said fifth MOS transistor, and, to a source thereof, said first voltage is fed;

a ninth first conductivity type MOS transistor arranged in such a manner that a drain thereof is connected to the drain of said eighth MOS transistor, and a gate thereof is connected to the gate of said sixth MOS transistor;

a resistor arranged in such a manner that one end thereof is connected to a source of said ninth MOS transistor, and, to another end thereof, said second voltage is fed;

a tenth second conductivity type MOS transistor arranged in such a manner that, to a source thereof, said first voltage is fed, and a gate thereof is connected to the drain of said eighth MOS transistor;

an eleventh first conductivity type MOS transistor arranged in such a manner that a gate and a drain thereof are connected to a drain of said tenth MOS transistor, and, to a source thereof, said second voltage is fed; and

a twelfth first conductivity type MOS transistor arranged in such a manner that a gate thereof is connected to the drain of said eleventh MOS transistor, a drain thereof is connected to the source of said first MOS transistor and the source of said second MOS transistor, and to a source thereof, said second voltage is fed.

13. The semiconductor integrated circuit device provided with a differential amplifier according to claim 4, wherein said constant-current source comprises:

a fifth first conductivity type MOS transistor to a source of which said second voltage is fed;

a sixth second conductivity type MOS transistor a gate and a drain of which are connected to a drain of said fifth MOS transistor;

a diode arranged in such a manner that an anode thereof is connected to a source of said sixth MOS transistor, while to a cathode thereof, said first voltage is fed;

a seventh first conductivity type MOS transistor arranged in such a manner that, to a source thereof, said second voltage is fed, and a gate and a drain thereof are connected to a gate of said fifth MOS transistor;

an eighth second conductivity type MOS transistor arranged in such a manner that a drain thereof is connected to the drain of said seventh MOS transistor, and a gate thereof is connected to the gate of said sixth MOS transistor;

a resistor arranged in such a manner that one end thereof is connected to a source of said eighth MOS transistor, and to another end thereof, said first voltage is fed; and

a ninth first conductivity type MOS transistor arranged in such a manner that, to a source thereof, said second voltage is fed, a gate thereof is connected to the drain of said seventh MOS transistor, and a drain thereof is connected to the source of said first MOS transistor and the source of said second MOS transistor.

10. A semiconductor integrated circuit device provided with a differential amplifier, said differential amplifier comprising:

first and second first conductivity type MOS transistors to respective gates of which input signals are fed, said first and second MOS transistors constituting a differential pair;

third and fourth second conductivity type MOS transistors drains of which are connected to drains of said first and second first conductivity type MOS transistors, respectively, said third and fourth MOS transistors constituting a load transistor pair with respect to said differential pair;

wherein, through one of a node between said first MOS transistor and said third MOS transistor and a node between said second MOS transistor and said fourth MOS transistor, an output signal is outputted; and

wherein at least one of the pair of said first and second MOS transistors, and the pair of said third and fourth MOS transistors, is comprised of intrinsic MOS transistors.

11. The semiconductor integrated circuit device provided with a differential amplifier according to claim 10, wherein said third and fourth second conductivity type MOS transistors are arranged in such a manner that gates thereof are connected in common to the other one of the node between said first MOS transistor and said third MOS transistor and the node between said second MOS transistor and said fourth MOS transistor, and thus constitute a current mirror circuit.

12. The semiconductor integrated circuit device provided with a differential amplifier according to claim 10, wherein the pair of said first and second MOS transistors are comprised of intrinsic MOS transistors.

14. The semiconductor integrated circuit device provided with a differential amplifier according to claim 10, further including a constant-current source comprising:

a fifth first conductivity type MOS transistor to a source of which a first voltage is fed;

a sixth second conductivity type MOS transistor a gate and a drain of which are connected to a drain of said fifth MOS transistor;

a diode arranged in such a manner that an anode thereof is connected to a source of said sixth MOS transistor, while to a cathode thereof, a second voltage is fed;

a seventh first conductivity type MOS transistor arranged in such a manner that, to a source thereof, said first voltage is fed, and a gate and a drain thereof are connected to a gate of said fifth MOS transistor;

an eighth second conductivity type MOS transistor arranged in such a manner that a drain thereof is connected to the drain of said seventh MOS transistor, and a gate thereof is connected to the gate of said sixth MOS transistor;

a resistor arranged in such a manner that one end thereof is connected to a source of said eighth MOS transistor, and to another end thereof, said second voltage is fed; and

a ninth first conductivity type MOS transistor arranged in such a manner that, to a source thereof, said first voltage is fed, a gate thereof is connected to the drain of said seventh MOS transistor, and a drain thereof is connected to a source of said first MOS transistor and a source of said second MOS transistor.

16. The semiconductor integrated circuit device provided with a differential amplifier according to claim 10, further comprising:

a first resistor arranged in such a manner that the output signal of said differential amplifier is fed to one end thereof, and a voltage at said one end is outputted as a reference voltage;

a first diode arranged in such a manner that an anode thereof is connected to another end of said first resistor, while to a cathode thereof, a predetermined voltage is fed, and a voltage at said anode is fed as said input signal to the gate of one of said first and second MOS transistors;

a second resistor one end of which is connected to the one end of said first resistor;

a third resistor arranged in such a manner that one end thereof is connected to another end of said second resistor, and a voltage at said one end is fed as said input signal to the gate of the other one of said first and second MOS transistors;

a second diode arranged in such a manner that an anode thereof is connected to another end of said third resistor, while a cathode thereof, said predetermined voltage is fed;

wherein said device constitutes a reference voltage generation circuit.

18. The semiconductor integrated circuit device provided with a differential amplifier according to claim 16, wherein the output signal of said differential amplifier is fed through a drain of a fifth first conductivity MOS transistor which a gate thereof is connected to the one of the node between said first MOS transistor and said third MOS transistor and the node between said second MOS transistor and said fourth MOS transistor, and to a source thereof, a first voltage applied to a source of said third MOS transistor and a source of said fourth MOS transistor is fed.

20. The semiconductor integrated circuit device provided with a differential amplifier according to claim 14, further comprising:

a first resistor arranged in such a manner that the output signal of said differential amplifier is fed to one end thereof, and a voltage at said one end is outputted as a reference voltage;

a first diode arranged in such a manner that an anode thereof is connected to the other end of said first resistor, while to a cathode thereof, a predetermined voltage is fed, and a voltage at said anode is fed as said input signal to the gate of one of said first and second MOS transistors;

a second resistor one end of which is connected to the one end of said first resistor;

a third resistor arranged in such a manner that one end thereof is connected to another end of said second resistor, and a voltage at said one end is fed as said input signal to the gate of the other one of said first and second MOS transistors;

a second diode arranged in such a manner that an anode thereof is connected to another end of said third resistor, while to a cathode thereof, said predetermined voltage is fed; and

wherein said fifth, sixth, seventh, eighth and ninth MOS transistors are comprised of the intrinsic MOS transistors, and wherein said device constitutes a reference voltage generation circuit.

22. The semiconductor integrated circuit device provided with a differential amplifier according to claim 20, wherein said low-pass filter comprises:

a fourth resistor which one end thereof is connected to an input terminal and another end thereof is connected to an output terminal; and

a capacitor which one end thereof is connected to said output terminal and another end thereof is grounded.

23. The semiconductor integrated circuit device provided with a differential amplifier according to claim 22, wherein said fourth resistor is provided in a region of a second conductivity type which is formed on a surface of a well of a first conductivity type, said first-conductivity type well is formed in a second-conductivity type well formed in said first-conductivity type substrate, and said first-conductivity type well, said second-conductivity type well and said first-conductivity type substrate are grounded.

24. The semiconductor integrated circuit device provided with a differential amplifier according to claim 22, wherein said capacitor comprises:

a well grounded;

a gate insulating layer formed on a surface of said well; and

an electrode formed on a surface of said gate insulating layer.