Shallow trench isolation filled by high density plasma chemical vapor deposition

• US 6,037,018 A
• Filed: 07/01/1998
• Issued: 03/14/2000
• Est. Priority Date: 07/01/1998
• Status: Expired due to Term

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Yu, Chen-Hua Douglas, Fu, Chu-Yun, Jang, Syun-Ming
• Primary Examiner(s): King, Roy V.
• Application Number:
  US09/108,866
• Time in Patent Office: 622 Days
• Field of Search: 427/579, 427/255.7, 427/255.37, 427/255.18, 427/419.3, 438/424, 438/435, 438/221, 438/296
• US Class Current: 427/579
• CPC Class Codes: C23C 16/402 Silicon dioxide
• CPC Class Codes: H01L 21/76232 of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls H01L21/76229 takes precedence

Abstract

A method for filling shallow trenches 28 with a HDPCVD oxide 50. The invention has two liners: (a) a thermal oxide liner 36 and (b) an overlying conformal O₃ -TEOS protective liner 40. The O₃ -TEOS protective liner 40 prevents the HDPCVD oxide 50 from sputter damaging the trench sidewalls and the masking layer 24. The O₃ -TEOS layer has novel process temperature (400 to 560° C.) and low pressure (40 to 80 torr) that allows the O₃ -TEOS layer to deposit uniformly over thermal oxide liner 36. The method begins by forming pad oxide layer 20 and a barrier layer 24 over a substrate. A trench 28 is formed in the substrate 10 through the pad oxide layer 20 and the barrier layer 24. A thermal oxide liner 36 and a protective O₃ -TEOS liner layer 40 are formed over the walls of the trench 28 and over the barrier layer 24. Lastly, a high density plasma chemical vapor deposition (HDPCVD) oxide layer 50 is formed over the protective liner layer 40 filling the trench 28.

Claims

1. A method of fabricating a HDPCVD oxide filled shallow trench isolation comprising the steps of:

a) forming a pad oxide layer over a semiconductor substrate;

b) forming a barrier layer over said pad oxide layer;

c) forming a trench in said semiconductor substrate through said pad oxide layer and said barrier layer;

said trench having sidewalls and a bottom;

d) forming a thermal oxide layer over said sidewalls and said bottom of said trench;

e) forming a protective liner layer on said thermal oxide layer and over said barrier layer;

said protective liner layer being composed of silicon oxide formed by an O₃ -TEOS process at a temperature between 400 and 560°

C.;

f) forming an oxide layer using a HDPCVD process over said protective liner layer filling said trench.

2. The method of claim 1 wherein said pad oxide layer has a thickness in a range of between about 100 and 150 Å

;

said barrier layer is composed of silicon nitride and having a thickness in a range of between about 1000 and 2000 Å

.

3. The method of claim 1 wherein said trench having a depth in a range of between about 3000 and 5000 Å

and a width in a range of between about 0.2 μ

m and 1.2 μ

m.

4. The method of claim 1 wherein said thermal oxide layer is formed with a thermal oxidation process at a temperature between about 850 and about 1000 degrees centigrade for a time period from about 20 to about 40 minutes and said thermal oxide layer having a thickness in a range of between about 150 and 400 Å

.

5. The method of claim 1 wherein said protective liner layer having a thickness in a range of between about 300 and 1000 Å

.

6. The method of claim 1 wherein said protective liner layer is formed using a LPCVD process having a O₃ flow rate between about 4000 and 6000 sccm, a TEOS flow rate between 380 and 570 mgm in a He flow rate between 3200 and 4800 sccm, and a pressure between 48 and 72 torr.

7. The method of claim 1 wherein said protective liner layer formed using LPCVD process having a O₃ flow rate between about 4000 and 6000 sccm, a TEOS flow rate between 380 and 570 mgm in a He flow rate between 3200 and 4800 sccm;

a pressure between 48 and 72 torr;

then densifying said protective liner layer at a temperature between 900 and 1100°

C. for a time between about 1.6 and 2.4 hours; and

in a N₂ environment.

8. The method of claim 1 wherein said oxide layer having a thickness in a range of between about 4800 and 7200 Å

.

9. The method of claim 1 wherein said oxide layer is formed using a HDPCVD process comprising:

a HDPCVD-sputter rate between about 1100 and 1650 Å

/min;

deposit to sputter ratio between 5.5 and 6.5;

an O₂ flow between 215 and 320 sccm;

a SiH₄ gas flow between 105 and 158 sccm;

an Ar flow rate between 100 and 150 sccm;

at a pressure between 9 and 13 torr and at a temperature between 450 and 600°

C.

10. A method of fabricating a HDPCVD oxide filled shallow trench isolation comprising the steps of:

a) forming pad oxide layer over a semiconductor substrate;

b) forming a barrier layer over said pad oxide layer;

c) forming a trench in said semiconductor substrate through said pad oxide layer and said barrier layer;

said trench having sidewalls and a bottom;

d) forming a thermal oxide layer over said sidewalls and said bottom of said trench;

e) forming a protective liner layer on said thermal oxide layer and over said barrier layer;

said protective liner layer is composed of silicon oxide formed by a O₃ -TEOS process;

(e1) said protective liner layer is formed using a LPCVD process at a pressure between 48 and 72 torr;

a temperature between 400 and 560°

C.;

f) forming an oxide layer using a HDPCVD process over said protective liner layer filling said trench;

(f1) said oxide layer is formed using a HDPCVD process comprising;

a deposition to sputter ratio between 5.0 and 7.0.

11. The method of claim 10 wherein said pad oxide layer having a thickness in a range of between about 100 and 150 Å

; and

said barrier layer is composed of silicon nitride and having a thickness in a range of between about 1000 and 2000 Å

.

12. The method of claim 10 wherein said trench having a depth in a range of between about 3000 and 5000 Å

and a width in a range of between about 0.2 μ

m and 1.2 μ

m.

13. The method of claim 10 wherein said thermal oxide layer is formed with a thermal oxidation process a temperature between about 850 and about 1000 degrees centigrade for a time period from about 20 to about 40 minutes;

said thermal oxide layer having a thickness in a range of between about 150 and 400 Å

.

14. The method of claim 10 wherein said protective liner layer having a thickness in a range of between about 300 and 1000 Å

.

15. The method of claim 10 wherein after said protective liner layer is formed, densifying said protective liner at a temperature between 900 and 1100°

C. for a time between about 1.6 and 2.4 hours; and

in a N₂ environment.

16. The method of claim 10 wherein said oxide layer having a thickness in a range of between about 4800 and 7200 Å

;

said oxide layer is formed using a HDPCVD process comprising a HDPCVD-sputter rate between about 1100 and 1650 Å

/min;

deposit to sputter ratio between 5.5 and 6.5;

an O₂ flow between 215 and 320 sccm;

a SiH₄ gas flow between 105 and 158 sccm;

an Ar flow rate between 100 and 150 sccm;

at a pressure between 9 and 13 torr and at a temperature between 450 and 600°

C.

17. A method of fabricating a HDPCVD oxide filled shallow trench isolation comprising the steps of:

a) forming pad oxide layer over a semiconductor substrate;

b) forming a barrier layer over said pad oxide layer;

c) forming a trench in said semiconductor substrate through said pad oxide layer and said barrier layer;

said trench having sidewalls and a bottom;

d) forming a thermal oxide layer over said sidewalls and said bottom of said trench;

e) forming a protective liner layer on said thermal oxide layer and over said barrier layer;

said protective liner layer is composed of silicon oxide formed by a O₃ -TEOS process;

(e1) said protective liner layer having a thickness in a range of between about 300 and 1000 Å

;

said protective liner layer is formed using a LPCVD process having a O₃ flow rate between about 4000 and 6000 sccm, a TEOS flow rate between 380 and 570 mgm in a He flow rate between 3200 and 4800 sccm, a pressure between 48 and 72 torr;

a temperature between 400 and 560°

C.;

(e2) after said protective liner layer is formed, densifying said protective liner at a temperature between 900 and 1100°

C. for a time between about 1.6 and 2.4 hours; and

in a N₂ environment;

f) forming an oxide layer using a HDPCVD process over said protective liner layer filling said trench 28;

(f1) said oxide layer having a thickness in a range of between about 4800 and 7200 Å

;

said oxide layer is formed using a HDPCVD process comprising;

a HDPCVD-sputter rate between about 1100 and 1650 Å

/min;

deposit to sputter ratio between 5.5 and 6.5;

an O₂ flow between 215 and 320 sccm;

a SiH₄ gas flow between 105 and 158 sccm;

an Ar flow rate between 100 and 150 sccm;

at a pressure between 9 and 13 torr and at a temperature between 450 and 600°

C.

18. The method of claim 17 wherein said thermal oxide layer is formed with a thermal oxidation process at a temperature between about 850 and about 1000 degrees centigrade for a time period from about 20 to about 40 minutes;

said thermal oxide layer having a thickness in a range of between about 150 and 400 Å

.