Differential SOI amplifiers having tied floating body connections
First Claim
1. An integrated circuit, comprising:
- a first SOI transistor comprising a plurality of nodes, the plurality of nodes comprising a first source/drain, a second source/drain, a gate for receiving a potential to enable a conductive path between the first source/drain and the second source/drain, and a body terminal coupled to a body region disposed between the first source/drain and the second source/drain;
a second SOI transistor comprising a plurality of nodes, the plurality of nodes comprising a first source/drain, a second source/drain, a gate for receiving a potential to enable a conductive path between the first source/drain and the second source/drain, and a body terminal coupled to a body region disposed between the first source/drain and the second source/drain;
wherein one of the plurality of nodes of the first SOI transistor is connected to receive a first differential input signal;
wherein a same one of the plurality of nodes of the second SOI transistor is connected to receive a second differential input signal; and
wherein the body of the first SOI transistor is connected to the body of the second SOI transistor and the bodies of the first and second SOI transistors are connected to float.
1 Assignment
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Accused Products
Abstract
An integrated circuit (SAI0) comprises a first SOI transistor (T4) comprising a plurality of nodes, the plurality of nodes comprising a first source/drain, a second source/drain, a gate for receiving a potential to enable a conductive path between the first source/drain and the second source/drain, and a body terminal coupled to a body region disposed between the first source/drain and the second source/drain. The integrated circuit further includes a second SOI transistor (T5) comprising a plurality of nodes, the plurality of nodes comprising a first source/drain, a second source/drain, a gate for receiving a potential to enable a conductive path between the first source/drain and the second source/drain, and a body terminal coupled to a body region disposed between the first source/drain and the second source/drain. In the integrated circuit, one of the plurality of nodes of the first SOI transistor is connected to receive a first differential input signal. Moreover, a same one of the plurality of nodes of the second SOI transistor is connected to receive a second differential input signal. Lastly, the body of the first SOI transistor is connected to the body of the second SOI transistor and the bodies of the first and second SOI transistors are connected to float.
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Citations
34 Claims
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1. An integrated circuit, comprising:
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a first SOI transistor comprising a plurality of nodes, the plurality of nodes comprising a first source/drain, a second source/drain, a gate for receiving a potential to enable a conductive path between the first source/drain and the second source/drain, and a body terminal coupled to a body region disposed between the first source/drain and the second source/drain; a second SOI transistor comprising a plurality of nodes, the plurality of nodes comprising a first source/drain, a second source/drain, a gate for receiving a potential to enable a conductive path between the first source/drain and the second source/drain, and a body terminal coupled to a body region disposed between the first source/drain and the second source/drain; wherein one of the plurality of nodes of the first SOI transistor is connected to receive a first differential input signal; wherein a same one of the plurality of nodes of the second SOI transistor is connected to receive a second differential input signal; and wherein the body of the first SOI transistor is connected to the body of the second SOI transistor and the bodies of the first and second SOI transistors are connected to float. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34)
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Specification