Precision programming of nonvolatile memory cells
First Claim
1. An integrated circuit memory system comprising:
- control means for controlling operations of said integrated circuit memory system;
a plurality of memory cells, each memory cell comprising a source, drain, control gate and floating gate, said floating gate capable of storing electric charge, said memory cells programmable by hot carrier injection of electric charge to said floating gate corresponding to input signals to said integrated memory system; and
circuit means, responsive to said control means, for iteratively applying incrementally varying voltages to a source, drain, or control gate of a selected memory cell and for controlling a current independently of said input signals, said current flowing between said source and drain during programming of said selected memory cell so that an amount of electric charge stored on said floating gate of said selected memory cell is precisely controlled.
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Accused Products
Abstract
An integrated circuit memory system and method for precision hot carrier injection programming of single or plurality of nonvolatile memory cells is described. Each program cycle is followed by a verify cycle. Precision programming is achieved by incrementally changing a programming current pulse flowing between the source and drain in the memory cell during successive program cycles and a constant current during successive verify cycles. Current control and voltage mode sensing circuitry reduces circuit complexity, reduces programming cell current, lowers power dissipation, and enables page mode operation. Precision programming is useful for multilevel digital and analog information storage.
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Citations
70 Claims
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1. An integrated circuit memory system comprising:
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control means for controlling operations of said integrated circuit memory system; a plurality of memory cells, each memory cell comprising a source, drain, control gate and floating gate, said floating gate capable of storing electric charge, said memory cells programmable by hot carrier injection of electric charge to said floating gate corresponding to input signals to said integrated memory system; and circuit means, responsive to said control means, for iteratively applying incrementally varying voltages to a source, drain, or control gate of a selected memory cell and for controlling a current independently of said input signals, said current flowing between said source and drain during programming of said selected memory cell so that an amount of electric charge stored on said floating gate of said selected memory cell is precisely controlled. - View Dependent Claims (3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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2. In an integrated memory system having a plurality of memory cells, each memory cell comprising a source, drain, control gate and floating gate, said floating gate capable of storing electric charge, said memory cells programmable by hot carrier injection corresponding to input signals to said integrated memory system, a method for programming said memory cells comprising:
iteratively applying incrementally varying voltages to a source, drain, or control gate of a selected memory cell and controlling a current independently of said input signals, said current flowing between said source and drain of said selected memory cell so that an amount of electric charge stored on said floating gate of said selected memory cell is precisely controlled. - View Dependent Claims (42, 43, 44, 45, 46, 47, 48, 49, 50)
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16. An integrated circuit memory system comprising:
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control means for controlling operations of said integrated circuit memory system; a plurality of memory cells, each memory cell comprising a source, drain, control gate and floating gate, said floating gate capable of storing electric charge, said memory cells programmable by hot carrier injection of electric charge to said floating gate corresponding to input signals to said integrated circuit memory system; and circuit means, responsive to said control means, for iteratively applying preselected voltages to a source, drain, and control gate of a selected memory cell and for controlling a current independently of said input signals, said current flowing between said source and drain during programming of said selected memory cell, said current varying incrementally during said iterative programming so that an amount of electric charge stored on a floating gate of said selected memory cell is precisely controlled. - View Dependent Claims (17, 18, 19, 20, 21, 22, 23, 24, 25)
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26. An integrated circuit memory system comprising:
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a system control block; an array of memory cells, each memory cell having a first terminal, a second terminal, a control gate and a floating gate, said floating gate capable of storing electric charge, said memory cells programmable by hot carrier injection of electric charge to said floating gate corresponding to input signals to said integrated circuit memory system; a first control block connected to a first terminal of a memory cell selected for programming, said first control block generating preselected programming voltages independently of said input signals; a second control block connected to a second terminal of said selected memory cell, said second control block generating preselected controlled currents independently of said input signals; and a third control block connected to a control gate of said selected memory cell, said third control block generating incrementally varying programming voltages independently of said input signals; whereby said first, second and third control blocks, responsive to said system control block, cooperatively control currents flowing between said first terminal and said second terminal during iterative programming of said selected memory cell so that an amount of electric charge stored on a floating gate of said selected memory cell is precisely controlled. - View Dependent Claims (27, 28, 29, 30, 31, 32, 33, 34)
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35. An integrated circuit memory system comprising:
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a system control block; an array of memory cells, each memory cell having a first terminal, a second terminal, a control gate and a floating gate, said floating gate capable of storing electric charge, said memory cells programmable by hot carrier injection of electric charge to said floating gate corresponding to input signals to said integrated circuit memory system; a first control block connected to a first terminal of a memory cell selected for programming, said first control block generating incrementally increasing programming voltages independently of said input signals; a second control block connected to a second terminal of said selected memory cell, said second control block generating preselected controlled currents independently of said input signals; and a third control block connected to a control gate of said selected memory cell, said third control block generating preselected programming voltages independently of said input signals; whereby said first, second and third control blocks, responsive to said system control block, cooperatively control currents flowing between said first terminal and said second terminal during iterative programming of said selected memory cell so that an amount of electric charge stored on a floating gate of said selected memory cell is precisely controlled. - View Dependent Claims (36, 37, 38, 39, 40, 41)
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51. In an integrated memory system having a plurality of memory cells, each memory cell comprising a source, drain, control gate and floating gate, said floating gate capable of storing electric charge, said memory cells programmable by hot carrier injection corresponding to input signals to said integrated memory system, a method for programming said memory comprising:
iteratively applying preselected voltages to a source, drain, and control gate of a selected memory cell and controlling a current independently of said input signals, said current flowing between a source and drain of said selected memory cell, said current varying incrementally so that an amount of electric charge stored on a floating gate of said selected memory cell is precisely controlled. - View Dependent Claims (52, 53, 54, 55, 56, 57)
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58. In an integrated circuit memory system having an array of memory cells, each memory cell comprising a first terminal, a second terminal, a control gate and a floating gate, said floating gate capable of storing electric charge, said memory cells programmable by hot carrier injection corresponding to input signals to said integrated circuit memory system, a method for programming a selected memory cell comprising:
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applying erase voltages to said first terminal, said second terminal, and said control gate of said selected memory cell so that said electric charge corresponding to input signals is removed from said floating gate to erase said selected memory cell; applying preselected programming voltages to said first terminal, said second terminal, and control gate and controlling the current flowing between said first terminal and said second terminal of said selected memory cell independently of said input signals so that an amount of electric charge stored on said floating gate is precisely controlled to program said selected memory cell; and applying programming verify voltages to said first terminal and said control gate, comparing said voltage at said second terminal of said selected memory cell with respect to a program reference voltage to verify that said selected memory cell is programmed; and repeating said programming voltages and programming verify voltages applying steps until a programming verify voltages applying step verifies that said selected memory cell is programmed, said preselected programming voltages incrementally increasing on said first terminal, said second terminal, or said control gate of said selected memory cell at each repetition. - View Dependent Claims (59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70)
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Specification