Apparatus for amplifying a signal using digital pulse width modulators

• US 6,038,265 A
• Filed: 09/24/1997
• Issued: 03/14/2000
• Est. Priority Date: 04/21/1997
• Status: Expired due to Term

• Current Assignee: Hanger Solutions, LLC (IP Investments Group LLC)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Wang, Shay-Ping T., Ma, Stephen Chih-Hung, Pan, Shaowei, Toler, Jeffrey G.
• Primary Examiner(s): Pham, Chi H.
• Assistant Examiner(s): Tran, Khai
• Application Number:
  US08/936,306
• Time in Patent Office: 902 Days
• Field of Search: 375/316, 375/238, 332/117, 332/119, 332/149, 332/151, 332/108, 455/102, 455/110, 455/112
• US Class Current: 375/316
• CPC Class Codes: G06J 1/00 Hybrid computing arrangements digitally-programmed analogue computers G06G7/06

Abstract

An electronic apparatus that includes a digital processor (12), a first digital pulse width modulator (304), a second digital pulse width modulator (306), a combining circuit (308), and a load (310). The digital processor (12) produces a first digital signal (314) and a second digital signal (316). The first digital pulse width modulator (304) is responsive to the first digital signal (314), and the second digital pulse width modulator (306) is responsive to the second digital signal (316). The combining circuit (308) is responsive to the first digital pulse width modulator (304) and the second digital pulse width modulator (306). The load (310) is responsive to the combining circuit (308).

Claims

1. An electronic apparatus comprising:

a digital processor producing a first digital signal and a second digital signal;

a first digital pulse width modulator responsive to the first digital signal;

a second digital pulse width modulator responsive to the second digital signal;

a first driver responsive to the first digital pulse width modulator;

a second driver responsive to the second digital pulse width modulator;

a first analog pulse width modulator responsive to the first driver;

a second analog pulse width modulator responsive to the first analog pulse width modulator and the second driver;

a switch capacitance responsive to the first analog pulse width modulator;

a first band pass filter responsive to the first analog pulse width modulator; and

a second band pass filter responsive to the switch capacitance.

2. The electronic apparatus of claim 1, further comprising a load responsive to the first band pass filter and the second band pass filter.

3. The electronic apparatus of claim 1, wherein the first digital signal comprises an amplitude modulated signal and the second digital signal comprises a frequency modulated signal.

4. The electronic apparatus of claim 1, wherein the digital processor includes at least one of a logarithm converter and an inverse logarithm converter.

5. The electronic apparatus of claim 1, wherein the first driver and the second driver further comprise differential outputs.

6. The electronic apparatus of claim 1, wherein the first analog pulse width modulator further comprises a first switching element, a second switching element, and an output filter.

7. The electronic apparatus of claim 6, wherein the first switching element and the second switching element comprise field effect transistors.

8. The electronic apparatus of claim 6, wherein the output filter comprises a low pass filter.

9. The electronic apparatus of claim 1, wherein the first analog pulse width modulator comprises differential inputs.

10. The electronic apparatus of claim 1, wherein the second analog pulse width modulator comprises differential inputs.

11. The electronic apparatus of claim 1, wherein the second analog pulse width modulator further comprises a supply input coupled to the first analog pulse width modulator.

12. The electronic apparatus of claim 1, wherein the digital processor further comprises a predistortion generation module and a digital modulator.

13. The electronic apparatus of claim 1, wherein the digital processor computes a nonlinear polynomial function.

14. An electronic apparatus comprising:

a digital logarithm based processor including a logarithm converter, a digital logic circuit, and an inverse logarithm converter;

a first digital pulse width modulator responsive to the digital logarithm based processor;

a second digital pulse width modulator responsive to the digital logarithm based processor;

a first driver responsive to the first digital pulse width modulator;

a second driver responsive to the second digital pulse width modulator;

a first analog pulse width modulator responsive to the first driver;

a second analog pulse width modulator responsive to the first driver;

a first switching element responsive to the first analog pulse width modulator and to the second driver;

a second switching element responsive to the first switching element and the second driver;

a third switching element responsive to the second analog pulse width modulator and to the second driver;

a fourth switching element responsive to the third switching element and the second driver;

a first band pass filter responsive to the first and second switching elements; and

a second band pass filter responsive to the third and fourth switching elements.

15. The electronic apparatus of claim 14, wherein the digital logarithm based processor includes a plurality of logarithm converters.

16. The apparatus of claim 14, wherein the digital logic circuit comprises one of a summer, a binary shifter, a register, a memory, and a multiplexer and further comprising an antenna responsive to the first and second bandpass filters.

17. An electronic apparatus comprising:

a first digital pulse width modulator receiving an amplitude modulated digital signal;

a second digital pulse width modulator receiving a frequency modulated digital signal;

a first driver responsive to the first digital pulse width modulator;

a second driver responsive to the second digital pulse width modulator;

a first analog pulse width modulator responsive to the first driver;

a second analog pulse width modulator responsive to the first analog pulse width modulator and the second driver;

a switch capacitance responsive to the first analog pulse width modulator;

a first band pass filter responsive to the first analog pulse width modulator; and

a second band pass filter responsive to the switch capacitance.

18. The electronic apparatus of claim 17, further comprising an antenna responsive to the first and second bandpass filters.

19. The electronic apparatus of claim 17, wherein the first analog pulse width modulator comprises at least one filter.