Detection for digital communication receivers

• US 6,038,269 A
• Filed: 11/20/1997
• Issued: 03/14/2000
• Est. Priority Date: 11/20/1997
• Status: Expired due to Term

• Current Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Original Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Inventors: Raghavan, Sreen A.
• Primary Examiner(s): Ghebretinsae, Temesghen
• Application Number:
  US08/974,450
• Time in Patent Office: 845 Days
• Field of Search: 375/341, 375/340, 375/348, 375/342, 371/43.8, 371/43.3
• US Class Current: 375/340
• CPC Class Codes: H04L 25/03178 Arrangements involving sequence estimation techniques

Abstract

A new detection system that improves the detection signal-to-noise (SNR) ratio of a digital communication system suffering from intersymbol interference is described. The detection system utilizes the sample power contained in the intersymbol interference created by the dispersive nature of the communication channel. Significant SNR advantages over more commonly used decision-feedback equalizers (DFE) and linear equalizers are realized.

Claims

1. A method of sequence detection of a communication channel with a symbol alphabet having A symbols and a channel function f(z), comprising:

receiving an input symbol in a kth time step, the input symbol being one of a sequence of input symbols;

calculating an array of branch metrics for the input symbol, each branch metric in the array of branch metrics being a measure of the difference between the input symbol and an array of predicted input symbols;

calculating a state metric for each of the A symbols in the symbol alphabet for the kth time step, the state metric being dependent on the state metric for the (k-1)th time step and the array of branch metrics;

determining a comparison result for each of the A symbols in the symbol alphabet in response to the state metric for each of the A symbols in the symbol alphabet and storing the comparison result for each of the A symbols for the kth time step in a traceback memory;

if the kth time step is a traceback time step, tracing back and outputting a best sequence of symbols based on the comparison results stored in the traceback memory.

2. A method of sequence detection as in claim 1, wherein A=2 and the symbol alphabet includes a first symbol and a second symbol.

3. A method of sequence detection as in claim 2, wherein:

the channel function is f(z)=1+f₁ z^-1 ;

the array of predicted input symbols includes a second-second prediction being 1+f₁, a first-second prediction being 1-f₁, a second-first prediction being -1+f₁, and a first-first prediction being -1-f₁ ;

calculating the array of branch metrics comprises, calculating the squared difference between the input symbol and a corresponding one of the array of predicted input symbols, the array of branch metrics having a second-second branch metric, a first-second branch metric, a second-first branch metric and a first-first branch metric;

calculating the state metric for the first symbol and the second symbol for the kth time step, the state metric for each of the 2 symbols having a first state metric and a second state metric, comprises;

for the first symbol state metric taking the lessor of the second symbol state metric for the (k-1)th time step plus the second-first branch metric and the first symbol state metric for the (k-1)th time step plus the first-first branch metric; and

for the second symbol state metric taking the lessor of the second symbol state metric for the (k-1)th time step plus the second-second branch metric and the first symbol state metric for the (k-1)th time step plus the first-second branch metric; and

determining the comparison result for the first symbol and the second symbol for the kth time step comprises

the comparison result for the first symbol being the first symbol if the first symbol state metric is the first state metric for the (k-1)th time step plus the first-first branch metric;

the comparison result for the first symbol being the second symbol if the first symbol state metric is the second symbol state metric for the (k-1)th time step plus the second-first branch metric;

the comparison result for the second symbol being the second symbol if the second symbol state metric is the second symbol state metric for the (k-1)th time step plus the second-second branch metric; and

the comparison result for the second symbol being the first symbol if the second symbol state metric is the first symbol state metric for the (k-1)th time step plus the first-second branch metric.

4. A method of sequence detection as in claim 1, wherein A=3 and the symbol alphabet includes a first symbol, a second symbol and a third symbol.

5. A method of sequence detection as in claim 1, wherein A=5 and the symbol alphabet includes a first symbol, a second symbol, a third symbol, a fourth symbol and a fifth symbol.

6. A method of sequence detection as in claim 4, wherein the channel function is f(z)=1+f₁ z^-1.

7. A method of sequence detection as in claim 5, wherein the channel function is f(z)=1+f₁ z^-1.

8. A sequence detector for a communication channel with a symbol alphabet having A symbols and a channel function f(z), comprising:

a branch metric generator, the branch metric generator calculating an array of branch metrics in response to an input symbol received in a kth time step and the channel function f(z);

an add-compare-select circuit coupled to the branch metric generator to receive the array of branch metrics, the add-compare-select circuit calculating a set of state metrics for the kth step and a set of comparison results for the kth time step in response to the set of state metrics for the (k-1)th time step and the array of branch metrics;

a starting state determiner coupled to the add-compare-select circuit to receive the set of state metrics and calculating a starting traceback state in response to the set of state metrics;

a traceback circuit coupled to the add-compare-select circuit to receive the set of comparison results for the kth step and coupled to the starting state determiner to receive the starting traceback state, the traceback circuit storing the comparison results for the (k-M)th time step through the kth time step, M being a traceback depth, and predicting a best sequence of symbols for the (k-M)th time step through the (k-M+L)th time step, L being less than M, every Lth time step; and

a last-in-first-out buffer coupled to the traceback circuit to receive the best sequence of symbols for the (k-M)th time step through the (k-M+L)th time step and output the best sequence of symbols in proper temporal sequence.

9. A sequence detector as in claim 8, wherein A=2 and the symbol alphabet includes a first symbol and a second symbol.

10. A sequence detector as in claim 8, wherein A=3 and the symbol alphabet includes a first symbol, a second symbol and a third symbol.

11. A sequence detector as in claim 8, wherein A=5 and the symbol alphabet includes a first symbol, a second symbol, a third symbol, a fourth symbol and a fifth symbol.

12. A sequence detector as in claim 8, wherein:

the channel function is f(z)=1+f₁ z^-1 ;

the array of branch metrics comprises the squared difference between the input symbol and a corresponding one of an array of predicted input symbols, the array of predicted input symbols includes a second-second prediction being 1+f₁, a first-second prediction being 1-f₁, a second-first prediction being -1+f₁, and a first-first prediction being -1-f₁, the array of branch metrics having a second-second branch metric, a first-second branch metric, a second-first branch metric and a first-first branch metric;

the state metric for each of the 2 symbols having a first state metric and a second state metric wherein

the first symbol state metric is the lessor of the second symbol state metric for the (k-1)th time step plus the second-first branch metric and the first symbol state metric for the (k-1)th time step plus the first-first branch metric; and

the second symbol state metric is the lessor of the second symbol state metric for the (k-1)th time step plus the second-second branch metric and the first symbol state metric for the (k-1)th time step plus the first-second branch metric; and

the comparison result for the first symbol being the first symbol if the first symbol state metric is the first state metric for the (k-1)th time step plus the first-first branch metric;

the comparison result for the first symbol being the second symbol if the first symbol state metric is the second symbol state metric for the (k-1)th time step plus the second-first branch metric;

the comparison result for the second symbol being the second symbol if the second symbol state metric is the second symbol state metric for the (k-1)th time step plus the second-second branch metric; and

the comparison result for the second symbol being the first symbol if the second symbol state metric is the first symbol state metric for the (k-1)th time step plus the first-second branch metric.

13. A sequence detector as in claim 8, wherein the traceback depth M is 8 and L is 2.

14. A sequence detector as in claim 8, wherein the traceback depth M is 16 and L is 4.

15. A sequence detector as in claim 8, wherein L is M/4.

16. A sequence detector as in claim 10, wherein the channel function is f(z)=1+f₁ z^-1.

17. A sequence detector as in claim 11, wherein the channel function is f(z)=1+f₁ z^-1.

18. A sequence detector as in claim 8 and further including a linear equalizer having an input terminal and an output terminal, the output terminal of the linear equalizer being coupled to the input terminal of the branch metric generator.

19. A sequence detector as in claim 18 and further including a decision feedback portion, the decision feedback portion being coupled between the second output of the add-compare-select circuit and a second input of the branch metric generator, the array of branch metrics calculated by the branch metric generator further depending on the output of the decision feedback portion.

20. A detector, comprising:

a branch metric generator which computes a branch metric array having a branch metric for each of an array of state transitions and which receives the ACS decision for final states of the detector at a previous time cycle and computation of the branch metric array depends on the ACS decision for final states of the detector at a previous time cycle;

an add-compare-select circuit coupled to the branch metric generator which determines a state metric for each state of the detector and an ACS decision for each final state of the detector;

a traceback circuit coupled to the add-compare-select circuit; and

a starting state determiner coupled between the add-compare select circuit and the traceback circuit.

21. A detector, comprising:

a branch metric generator which computes a branch metric array having a branch metric for each of an array of state transitions;

an add-compare-select circuit coupled to the branch metric generator which determines a state metric for each state of the detector and an ACS decision for each final state of the detector;

a traceback circuit coupled to the add-compare-select circuit which stores the ACS decisions and on designated time cycles traces a sequence of states back from a starting state determined by the starting state determiner to determine an output sequence of symbols; and

a starting state determiner coupled between the add-compare select circuit and the traceback circuit.

22. The detector of claim 21, wherein states of the detector include the influence of one ISI symbol.

23. The detector of claim 21, wherein states of the detector include the influence of two ISI symbols.

24. The detector of claim 21, wherein states of the detector include the influence of more than two ISI symbols.

25. The detector of claim 21, wherein the state of the detector includes symbols from a symbol alphabet having A symbols.

26. The detector of claim 25, wherein A is two and the symbol alphabet includes the symbols +1 and -1.

27. The detector of claim 25, wherein A is three and the symbol alphabet includes the symbols +1, 0, and -1.

28. The detector of claim 25, wherein A is five and the symbol alphabet includes the symbols +2, +1, 0, -1 and -2.