Dynamic peripheral control of I/O buffers in peripherals with modular I/O

• US 6,038,621 A
• Filed: 11/04/1996
• Issued: 03/14/2000
• Est. Priority Date: 11/04/1996
• Status: Expired due to Fees

• Current Assignee: Hewlett-Packard Company (HP Inc.)
• Original Assignee: Hewlett-Packard Company (HP Inc.)
• Inventors: Gale, Thomas S., Fulghum, Patrick W., Jahr, Steven J., Wendt, James G., Smith, Kevin N.
• Primary Examiner(s): Sheikh, Ayaz R.
• Assistant Examiner(s): PHAN, RAYMOND NGAN
• Application Number:
  US08/743,618
• Time in Patent Office: 1,226 Days
• Field of Search: 395/832-834, 395/836-839, 395/842, 395/843, 395/848, 395/872, 395/876, 395/877, 395/882-883, 395/309, 395/311, 395/250, 395/200.42-200.46, 711/147-148, 711/152-153
• US Class Current: 710/56
• CPC Class Codes: G06F 5/06 for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor G06F7/78 takes precedence

Abstract

A peripheral system includes (a) a peripheral device having peripheral memory located thereon, (b) at least one input/output (I/O) card communicating with the peripheral device, and (c) a means for managing the peripheral memory between the peripheral device and the at least one I/O card. In a preferred embodiment, the means for managing the peripheral memory includes (a) a means for determining, during normal operation, an optimum amount of peripheral memory for allocating to each I/O card, and (b) a means for allocating, during normal operation, the optimum amount of peripheral memory to each I/O card. A preferred method for managing memory, between a peripheral device, having peripheral memory thereon, and at least one input/output (I/O) card, includes (a) determining, during normal operation, an optimum amount of peripheral memory for allocating to each I/O card, and (b) allocating, during normal operation, the optimum amount of peripheral memory to each I/O card.

Claims

1. A peripheral system comprising:

(a) a peripheral device having peripheral memory located thereon;

(b) at least one input/output (I/O) card having at least one channel and communicating with the peripheral device;

(c) means for allocating the peripheral memory between the peripheral device, the at least one I/O card, and each channel of the at least one I/O card;

(d) first peripheral means for reclaiming from the at least one I/O card, during normal operation, control of an amount of peripheral memory allocated to the at least one I/O card; and

,

(e) second peripheral means for reclaiming from the at least one channel, during normal operation, control of an amount of peripheral memory allocated to the at least one channel.

2. The peripheral system of claim 1 further including:

(a) first means for determining, during normal operation, an optimum amount of peripheral memory for allocating to each I/O card; and

,

(b) second means for determining, during normal operation, an optimum amount of peripheral memory for allocating to each channel.

3. A peripheral system comprising:

(a) a peripheral device having peripheral memory located thereon;

(b) at least one input/output (I/O) card communicating with the peripheral device; and

,

(c) means for managing the peripheral memory between the peripheral device and the at least one I/O card, the means for managing the peripheral memory including;

(i) means for determining, during normal operation, an optimum amount of peripheral memory for allocating to each I/O card, the means for determining including means for considering, selectively, an amount of I/O activity, a print job status, a print job size, a print job priority, an I/O transmission speed, and an I/O type;

(ii) means for allocating, during normal operation, the optimum amount of peripheral memory to each I/O card; and

(iii) peripheral means for reclaiming from the at least one I/O card, during normal operation, control of the amount of peripheral memory allocated to the at least one I/O card.

4. A peripheral system comprising:

(a) a peripheral device having peripheral memory located thereon,

(b) at least one input/output (I/O) card having at least one channel and communicating with the peripheral device; and

,

(c) means for managing the peripheral memory between the peripheral device and the at least one I/O card, the means for managing the peripheral memory including;

(i) first means for determining, during normal operation, a first optimum amount of peripheral memory for allocating to each I/O card, the means for determining including means for considering, selectively, an amount of I/O activity, a print job status, a print job size, a print job priority, an I/O transmission speed, and an I/O type;

(ii) second means for determining, during normal operation, a second optimum amount of peripheral memory for allocating to each channel;

(iii) first means for allocating, during normal operation, the first optimum amount of peripheral memory to each I/O card; and

(iv) second means for allocating, during normal operation, the second optimum amount of peripheral memory to each channel.

5. A system for managing memory between a peripheral device, having peripheral memory thereon, and at least one input/output (I/O) card having at least one channel, the system comprising:

(a) first means for determining, during normal operation, a first optimum amount of peripheral memory for allocating to each I/O card;

(b) second means for determining, during normal operation, a second optimum amount of peripheral memory for allocating to each channel;

(c) first means for allocating, during normal operation, the first optimum amount of peripheral memory to each I/O card;

(d) second means for allocating, during normal operation, the second optimum amount of peripheral memory to each channel; and

,

wherein the first and second means for determining each include a means for considering, selectively, an amount of I/O activity, a print job status, a print job size, a print job priority, an I/O transmission speed, and an I/O type.

6. A method for managing memory between a peripheral device, having peripheral memory thereon, and at least one input/output (I/O) card having at least one channel, the method comprising:

(a) determining, during normal operation, a first optimum amount of peripheral memory for allocating to each I/O card;

(b) determining, during normal operation, a second optimum amount of peripheral memory for allocating to each channel;

(c) allocating, during normal operation, the first optimum amount of peripheral memory to each I/O card; and

,

(d) allocating, during normal operation, the second optimum amount of peripheral memory to each channel; and

,

wherein the first and second optimum amounts of peripheral memory are determined from, selectively, an amount of I/O activity, a print job status, a print job size, a print job priority, an I/O transmission speed, and an I/O type.

7. A peripheral system comprising:

(a) a peripheral device having peripheral memory located thereon;

(b) at least one input/output (I/O) card communicating with the peripheral device, the at least one I/O card having at least one channel;

(c) means for allocating the peripheral memory between the peripheral device, the at least one I/O card, and each channel of each I/O card;

(d) first I/O card means for returning to the peripheral device, during normal operation, control of an amount of peripheral memory allocated to the at least one I/O card; and

,

(e) second I/O card means for returning to the peripheral device, during normal operation, control of an amount of peripheral memory allocated to the at least one channel.

8. The peripheral system of claim 7 further including:

(a) first means for determining, during normal operation, an optimum amount of peripheral memory for allocating to each I/O card; and

,

(b) second means for determining, during normal operation, an optimum amount of peripheral memory for allocating to each channel.

9. A peripheral system comprising:

(a) a peripheral device having peripheral memory located thereon;

(b) at least one input/output (I/O) card communicating with the peripheral device; and

,

(c) means for managing the peripheral memory between the peripheral device and the at least one I/O card, the means for managing the peripheral memory including;

(i) means for determining, during normal operation, an optimum amount of peripheral memory for allocating to each I/O card, the means for determining including means for considering, selectively, an amount of I/O activity, a print job status, a print job size, a print job priority, an I/O transmission speed, and an I/O type;

(ii) means for allocating, during normal operation, the optimum amount of peripheral memory to each I/O card; and

(iii) I/O card means for returning to the peripheral device, during normal operation, control of the amount of peripheral memory allocated to the at least one I/O card.

10. A peripheral system comprising:

(a) a peripheral device having peripheral memory located thereon;

(b) at least one input/output (I/O) card having at least one channel and communicating with the peripheral device; and

,

(c) means for managing the peripheral memory between the peripheral device, the at least one I/O card, and each channel of the at least one I/O card, the means for managing the peripheral memory including;

(i) first means for determining, during normal operation, a first optimum amount of peripheral memory for allocating to each I/O card;

(ii) second means for determining, during normal operation, a second optimum amount of peripheral memory for allocating to each channel;

(iii) first means for allocating, during normal operation, the first optimum amount of peripheral memory to each I/O card; and

(iv) second means for allocating, during normal operation, the second optimum amount of peripheral memory to each channel.

11. The peripheral system of claim 10 wherein the first and the second means for allocating each include:

(a) means for writing a packet to a queue position, each packet including;

(i) a start of data packet header field containing a first value indicating an address in the peripheral memory of a buffer and,

(ii) a maximum data length packet header field containing a second value indicating a size of the buffer; and

,

(b) peripheral means for selectively changing the first value and the second value.

12. The peripheral system of claim 10 wherein the means for managing the peripheral memory further includes peripheral means for reclaiming from the at least one I/O card, during normal operation, control of an amount of peripheral memory allocated to the at least one I/O card.

13. The peripheral system of claim 10 wherein the means for managing the peripheral memory further includes I/O card means for returning to the peripheral device, during normal operation, control of an amount of peripheral memory allocated to the at least one I/O card.

14. A system for managing memory between a peripheral device, having peripheral memory thereon, and at least one input/output (I/O) card having at least one channel, the system comprising:

(a) first means for determining, during normal operation, a first optimum amount of peripheral memory for allocating to each I/O card;

(b) second means for determining, during normal operation, a second optimum amount of peripheral memory for allocating to each channel;

(c) first means for allocating, during normal operation, the first optimum amount of peripheral memory to each I/O card; and

,

(d) second means for allocating, during normal operation, the second optimum amount of peripheral memory to each channel.

15. The system of claim 14 wherein the first and second means for allocating each include:

(a) means for writing a packet to a queue position, each packet including;

(i) a start of data packet header field containing a first value indicating an address in the peripheral memory of a buffer and,

(ii) a maximum data length packet header field containing a second value indicating a size of the buffer; and

,

(b) peripheral means for selectively changing the first value and the second value.

16. The system of claim 14 further including peripheral means for reclaiming from the at least one I/O card, during normal operation, control of the first amount of peripheral memory allocated to the at least one I/O card.

17. The system of claim 14 further including I/O card means for returning to the peripheral device, during normal operation, control of the first amount of peripheral memory allocated to the at least one I/O card.

18. A method for managing memory between a peripheral device, having peripheral memory thereon, and at least one input/output (I/O) card having at least one channel, the method comprising:

(a) determining, during normal operation, a first optimum amount of peripheral memory for allocating to each I/O card;

(b) determining, during normal operation, a second optimum amount of peripheral memory for allocating to each channel;

(c) allocating, during normal operation, the first optimum amount of peripheral memory to each I/O card; and

,

(d) allocating, during normal operation, the second optimum amount of peripheral memory to each channel.

19. The method of claim 18 wherein allocating the first and second optimum amounts of peripheral memory includes:

(a) writing a packet to a queue position, each packet including;

(i) a start of data packet header field containing a first value indicating an address in the peripheral memory of a buffer and,

(ii) a maximum data length packet header field containing a second value indicating a size of the buffer; and

,

(b) the peripheral device selectively changing the first value and the second value.

20. The method of claim 18 further including the peripheral device reclaiming from the at least one I/O card, during normal operation, control of the first amount of peripheral memory allocated to the at least one I/O card.

21. The method of claim 18 further including the I/O card returning to the peripheral device, during normal operation, control of the first amount of peripheral memory allocated to the at least one I/O card.