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Elimination of oxynitride (ONO) etch residue and polysilicon stringers through isolation of floating gates on adjacent bitlines by polysilicon oxidation

  • US 6,043,120 A
  • Filed: 03/03/1998
  • Issued: 03/28/2000
  • Est. Priority Date: 03/03/1998
  • Status: Expired due to Term
First Claim
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1. A method for fabricating a first memory cell and a second memory cell electrically isolated from each other, comprising the steps of:

  • forming a first polysilicon (poly I) layer on an oxide coated substrate;

    forming a sacrificial oxide layer over the poly I layer;

    masking the poly I layer and sacrificial oxide layer to pattern floating gates of the first memory cell and the second memory cell and an unmasked portion therebetween;

    transforming the unmasked portion of the poly I layer into an insulator via thermal oxidation such that the insulator electrically isolates a floating gate of the first memory cell from a floating gate of the second memory cell;

    forming an interpoly dielectric layer over the floating gates and insulator; and

    forming a second polysilicon (poly II) layer over the interpoly dielectric layer.

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