Microprocessor suitable for reproducing AV data while protecting the AV data from illegal copy and image information processing system using the microprocessor

• US 6,044,157 A
• Filed: 03/10/1997
• Issued: 03/28/2000
• Est. Priority Date: 03/08/1996
• Status: Expired due to Term

• Current Assignee: Panasonic Intellectual Property Corporation of America (Panasonic Holdings Corporation)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Uesaka, Yasushi, Yamauchi, Kazuhiko, Kozuka, Masayuki, Higaki, Nobuo, Horiuchi, Koichi, Haruna, Syusuke
• Primary Examiner(s): Barron, Jr., Gilberto
• Assistant Examiner(s): CODDINGTON, TREVOR Q
• Application Number:
  US08/815,404
• Time in Patent Office: 1,114 Days
• Field of Search: 380/20, 380/4, 380/5, 380/201, 380/200, 380/203, 380/217, 380/239, 712/32, 712/36, 713/189, 713/193, 713/200, 713/190
• US Class Current: 380/201
• CPC Class Codes: G06F 9/30003 Arrangements for executing specific machine instructions
• CPC Class Codes: G11B 20/00086 Circuits for prevention of unauthorised reproduction or copying, e.g. piracy indicating unauthorised use of record carriers in general G11B23/28; scrambling for television signal recording H04N5/913; network architectures or network protocols for network security H04L63/00; cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
• CPC Class Codes: G11B 20/0021 involving encryption or decryption of contents recorded on or reproduced from a record carrier
• CPC Class Codes: G11B 20/00768 wherein copy control information is used, e.g. for indicating whether a content may be copied freely, no more, once, or never, by setting CGMS, SCMS, or CCI flags
• CPC Class Codes: G11B 20/1251 for continuous data, e.g. digitised analog information signals, pulse code modulated [PCM] data
• CPC Class Codes: H04N 2005/91321 the copy protection signal being a copy protection control signal, e.g. a record inhibit signal
• CPC Class Codes: H04N 2005/91328 the copy protection signal being a copy management signal, e.g. a copy generation management signal [CGMS]
• CPC Class Codes: H04N 5/85 on discs or drums
• CPC Class Codes: H04N 5/913 for scrambling ; for copy protection
• CPC Class Codes: H04N 9/8042 involving data reduction

Abstract

A microprocessor used in an image information processing system is provided. The microprocessor includes: decryption unit 59 for decrypting the encrypted compressed AV data; IDCT unit 58 for performing an inverse DCT to decompress the decrypted compressed AV data; and microprogram memory 54 for storing microprograms for executing the AV data reproduction instruction which performs decryption and decompression of the encrypted compressed AV data inseparably by using the decryption unit 59 and IDCT unit 58.

Claims

1. A microprocessor for executing an instruction loaded in a memory, the microprocessor comprising:

instruction fetch means for fetching the instruction from the memory;

instruction decode means for decoding the instruction fetched by the instruction fetch means, wherein the instruction includes an AV data reproduce instruction; and

execute means for executing the instruction decoded by the instruction decode means;

wherein the execute means comprises;

an AV data reproduce unit for, when the instruction decode means decodes the AV data reproduce instruction, inseparably executing a process of storing compressed AV data into the memory and a process of decompressing the compressed AV data extracted from the memory; and

operation mode storage means for storing an operation mode, wherein the operation mode is either of a first operation mode under which all kinds of instructions may be executed and a second operation mode under which certain kinds of instructions may be executed,

wherein the instruction decoded by the instruction decode means includes an AV data store instruction and an AV data decompress instruction;

wherein the instruction decode means decodes the AV data store instruction only when the mode storage means stores the first operation mode;

wherein the execute means farther comprises;

a storage unit for performing the process of storing compressed AV data into the memory when the instruction decode means decodes the AV data store instruction; and

a decompress unit for performing the process of decompressing the compressed AV data when the instruction decode means decodes the AV data decompress instruction,

wherein the AV data reproduce unit updates the operation mode of the operation mode storage means to the first operation mode before performing the process of storing compressed AV data into the memory and the process of decompressing the compressed AV data respectively based on the AV data store instruction and the AV data decompress instruction.

2. The microprocessor of claim 1,

wherein the instruction decoded by the instruction decode means includes an AV data read instruction and an AV data decrypt instruction,

wherein the execute means further comprises:

a read unit for reading encrypted compressed AV data from an external apparatus when the instruction decode means decodes the AV data read instruction; and

a decrypt unit for decrypting the encrypted compressed AV data when the instruction decode means decodes the AV data decrypt instruction,

wherein the AV data reproduce unit performs the process of reading encrypted compressed AV data and the process of decrypting the encrypted compressed AV data respectively based on the AV data read instruction and the AV data decrypt instruction before performing the process of storing compressed AV data into the memory.

3. An image information processing system as recited in claim 2 comprising:

an AV data read apparatus for reading digital data from an external medium, encrypting the digital data if the digital data is compressed AV data, and outputting the encrypted compressed AV data;

an AV output apparatus for receiving image data and voice data, converting the image data and voice data respectively into an image signal and a voice signal, and displaying an image and outputting a voice;

a control apparatus, comprising the microprocessor and the memory for converting the encrypted compressed AV data output from the AV data read apparatus into the image data and the voice data and transferring the image data and the voice data to the AV output apparatus.

4. A microprocessor for executing an instruction loaded in a memory, the microprocessor comprising:

instruction fetch means for fetching the instruction from the memory;

instruction decode means for decoding the instruction fetched by the instruction fetch means;

wherein the instruction includes an AV data read instruction,

wherein the instruction decode means comprises a privilege infringement monitor unit for judging whether a privilege infringement has occurred if the instruction fetched by the instruction fetch means is the AV data read instruction, and stoping decoding of the AV data read instruction if the privilege infringement monitor unit judges that the privilege infringement has occurred; and

execute means for executing the instruction decoded by the instruction decode means,

wherein the execute means comprises;

an AV data read unit for, when the instruction decode means decodes the AV data read instruction, reading compressed AV data from an external medium and storing the read compressed AV data into the memory.

5. The microprocessor of claim 4,

wherein the privilege infringement monitor unit, comprising an operation mode storage unit for storing information specifying a current operation mode of the microprocessor, judges that the privilege infringement has not occurred if the instruction fetched by the instruction fetch means is the AV data read instruction and if the information stored in the operation mode storage unit specifies an operation mode under which only instructions for processing AV data may be executed.

6. A microprocessor for executing an instruction loaded in a memory, the microprocessor comprising:

instruction fetch means for fetching the instruction from the memory;

instruction decode means for decoding the instruction fetched by the instruction fetch means;

wherein the instruction includes an AV data read instruction,

wherein the instruction decode means comprises a privilege infringement monitor unit for judging whether a privilege infringement has occurred if the instruction fetched by the instruction fetch means is the AV data read instruction, and stopping the decoding of the AV data read instruction if the privilege infringement monitor unit judges that the privilege infringement has occurred; and

wherein the privilege infringement monitor unit includes an operation mode storage unit for storing information specifying a current operation mode of the microprocessor and said privilege infringement monitor judges that the privilege infringement has not occurred if the instruction fetched by the instruction fetch means is the AV data read instruction and if the information stored in the operation mode storage unit specifies an operation mode under which only instructions for processing AV data is executed;

execute means for executing the instruction decoded by instruction decode means,

wherein the execute means comprises;

an AV data read unit for, when the instruction decode means decodes the AV data read instruction, reading compressed AV data from an external medium and storing the read compressed AV data into the memory; and

wherein the instruction decoded by the instruction decode means further includes an AV data transfer instruction,

wherein the execute means further comprises a transfer unit for, if the instruction decode means decodes the AV data transfer instruction, transferring the compressed AV data from the memory to a specified location,

wherein the execute means further comprises;

an area storage unit for storing information which specifies a predetermined AV data area of memory; and

an access area monitor unit for judging whether the specified location is in the predetermined AV data area by referring to an address of the specified location and stopping the transferring of the compressed AV data to the specified location.

7. The microprocessor of claim 6,

wherein the access area monitor unit stops transferring of the compressed AV data by cutting an output of an address signal output by the microprocessor.

8. An image information processing system as recited in claim 7 comprising:

an AV data read apparatus for reading digital data from an external medium, encrypting the digital data if the digital data is compressed AV data, and outputting the encrypted compressed AV data;

an AV output apparatus for receiving image data and voice data, converting the image data and voice data respectively into an image signal and a voice signal, and displaying an image and outputting a voice;

a control apparatus, comprising the microprocessor and the memory for converting the encrypted compressed AV data output from the AV data read apparatus into the image data and the voice data and transferring the image data and the voice data to the AV output apparatus.

9. An image information processing system comprising:

a first storage means for storing a reproduction control program for reproducing compressed AV data, wherein the reproduction control program includes a set of encrypted instructions and a set of not-encrypted instructions, wherein each of the encrypted instructions includes an instruction for dealing with the compressed AV data and each of the not-encrypted instructions includes a call instruction for moving an execution control to an encrypted instruction; and

a microprocessor which comprises execute means for executing an instruction stored in the first storage means,

wherein the execute means comprises;

an execution prohibit unit for prohibiting the call instruction from being executed based on a signature code included in the call instruction; and

a decrypt unit for decrypting the set of encrypted instructions before the set of encrypted instructions are executed.

10. The image information processing system of claim 9,

wherein the execution prohibit unit judges whether an instruction to be executed generates a privilege infringement and prohibits the instruction from being executed if the execution prohibit unit judges that the instruction generates the privilege infringement.

11. The image information processing system of claim 10 further comprising

second storage means,

wherein the microprocessor further comprises an operation mode storage unit for storing information specifying a current operation mode of the microprocessor,

wherein the execution prohibit unit prohibits the instruction from being executed if the instruction is to access the second storage means and if the information stored in the operation mode storage unit specifies an operation mode under which instructions for processing AV data are prohibited from being executed.

12. The image information processing system of claim 11 further comprising:

an AV data read apparatus for reading compressed AV data from an external medium and outputting the compressed AV data;

an AV output apparatus for receiving image data and voice data, converting the image data and voice data respectively into an image signal and a voice signal, and displaying an image and outputting a voice;

wherein the microprocessor, based on the reproduction control program, converts the compressed AV data output from the AV data read apparatus into the image data and the voice data and transferring the image data and the voice data to the AV output apparatus.

13. A system for reading and displaying AV signals from a medium storing AV data while inhibiting unauthorized reproduction of AV data stored on said medium comprising:

an AV reading unit for reading said AV data from said medium, said AV reading unit encrypting said AV data and storing control information in an unencrypted state;

a microprocessor connected to said AV reading unit and receiving said encrypted AV data and said control information, said microprocessor adapted to write the encrypted AV data to a memory location connected to said microprocessor, and said microprocessor upon a request to extract said stored encrypted AV data further adapted to a) read said compressed AV data from said memory, b) decrypt said compressed AV data, and c) decompress said compressed AV data in a series of inseparable, consecutive operations; and

a digital to analog converter for converting the decompressed, decrypted AV data from said microprocessor to AV signals corresponding to said AV data; and

display means for displaying said AV signals.