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Memory controller for controlling memory accesses across networks in distributed shared memory processing systems

  • US 6,044,438 A
  • Filed: 07/10/1997
  • Issued: 03/28/2000
  • Est. Priority Date: 07/10/1997
  • Status: Expired due to Fees
First Claim
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1. A memory controller for a local node of a shared memory parallel processing system, said node including a node processor, a node memory, a node cache and an I/O adapter, said system including a multi-stage switching network for communications amongst said local node and a plurality of remote nodes, said node memory including a changeable portion and an unchangeable portion;

  • said memory controller comprising;

    first means responsive to a request by said processor for access to a memory word for first accessing said node cache of said local node;

    second means responsive to said first means being unable to access said memory word in said node cache for accessing said memory word selectively from a cache line in said node memory or remote memory and storing said cache line to said node cache; and

    third means responsive to a request by said node processor for writing a memory word to said node cache of said local node by storing immediately said memory word data to the node cache and also to either the node memory or the remote memory.

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