Method for forming dielectric layer of capacitor

• US 6,046,081 A
• Filed: 06/10/1999
• Issued: 04/04/2000
• Est. Priority Date: 06/10/1999
• Status: Expired due to Term

• Current Assignee: United Microelectronics Corporation
• Original Assignee: United Microelectronics Corporation
• Inventors: Kuo, Chien-Li
• Primary Examiner(s): Bowers, Charles
• Assistant Examiner(s): WHIPPLE, MATTHEW LAVERNE
• Application Number:
  US09/330,246
• Time in Patent Office: 299 Days
• Field of Search: 438/240, 438/287, 438/785, 438/591, 438/216, 438/396
• US Class Current: 438/240
• CPC Class Codes: H01L 21/02183 the material containing tantalum, e.g. Ta2O5
• CPC Class Codes: H01L 21/02186 the material containing titanium, e.g. TiO2
• CPC Class Codes: H01L 21/022 the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides adhesion layers or buffer layers H01L21/02304, H01L21/02362
• CPC Class Codes: H01L 21/02244 of a metallic layer
• CPC Class Codes: H01L 21/02255 formation by thermal treatment H01L21/02252 takes precedence; after treatment of an insulating film H01L21/3105 and subgroups
• CPC Class Codes: H01L 21/31604 Deposition from a gas or vapour H01L21/31691, H01L21/31695 take precedence
• CPC Class Codes: H01L 28/40 Capacitors
• CPC Class Codes: H01L 28/56 the dielectric comprising two or more layers, e.g. comprising buffer layers, seed layers, gradient layers

Abstract

A method for forming the dielectric layer of a capacitor. A titanium layer and a tantalum pentoxide layer are sequentially formed over a polysilicon lower electrode. A high-temperature treatment is performed so that titanium in the titanium layer and silicon in the polysilicon lower electrode react to form a titanium silicide layer at their interface. Titanium in the titanium layer also reacts with oxygen in the atmosphere to form a titanium oxide layer at its interface with the tantalum pentoxide layer. The titanium silicide layer, the titanium oxide layer and the tantalum pentoxide layer together constitute a composite dielectric layer with a high dielectric constant capable of increasing the capacitance of the capacitor.

Claims

1. A method of forming the dielectric layer of a capacitor, comprising the steps of:

providing a lower electrode;

forming a titanium layer on the lower electrode;

depositing tantalum pentoxide over the titanium layer; and

performing a high-temperature treatment in an atmosphere of oxygen to form a titanium oxide layer at an interface between the tantalum pentoxide layer and the titanium layer.

2. The method of claim 1, wherein the step of performing the high-temperature treatment further includes adjusting a flow of oxygen into the atmosphere.

3. The method of claim 1, wherein the lower electrode includes a polysilicon layer.

4. A method of forming a capacitor, comprising the steps of:

forming a transistor over a substrate, wherein the transistor contains a gate and a source/drain region;

forming a patterned dielectric layer over the substrate and the transistor, wherein the patterned dielectric layer has a storage node opening that exposes a portion of the source/drain region;

depositing conductive material to fill the node opening and cover the dielectric layer, thereby forming a lower electrode that couples electrically with the source/drain region;

forming a patterned titanium layer over the lower electrode;

forming a tantalum pentoxide layer over the titanium layer;

performing a high-temperature treatment in an atmosphere with oxygen; and

forming an upper electrode over the tantalum pentoxide layer.

5. The method of claim 4, wherein the lower electrode includes a polysilicon layer.

6. The method of claim 4, wherein the step of performing the high-temperature treatment further includes adjusting a flow of oxygen into the atmosphere.

7. The method of claim 4, wherein the step of forming the upper electrode includes the substeps of:

forming a titanium silicide layer over the tantalum pentoxide layer, and

forming a polysilicon layer over the titanium silicide layer.