Method for selective growth of Cu.sub.3 Ge or Cu.sub.5 Si for passivation of damascene copper structures and device manufactured thereby

• US 6,046,108 A
• Filed: 06/25/1999
• Issued: 04/04/2000
• Est. Priority Date: 06/25/1999
• Status: Expired due to Term

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Liu, Chung-Shi, Yu, Chen-Hua, Bao, Tien-I, Jang, Syun-Ming
• Primary Examiner(s): Niebling, John F.
• Assistant Examiner(s): GURLEY, LYNNE ANN
• Application Number:
  US09/344,402
• Time in Patent Office: 284 Days
• Field of Search: 438/687, 438/637, 438/638, 438/643, 438/648, 438/653, 438/666, 438/668, 438/672, 438/626, 438/629, 438/631, 438/633, 438/675, 438/656, 438/683, 438/627, 438/669
• US Class Current: 438/687
• CPC Class Codes: H01L 21/7684 Smoothing; Planarisation
• CPC Class Codes: H01L 21/76849 the layer being positioned on top of the main fill metal
• CPC Class Codes: H01L 21/76867 characterized by methods of formation other than PVD, CVD or deposition from a liquids PVD H01L21/2855; CVD H01L21/28556; deposition from liquids H01L21/288

Abstract

Form a dielectric layer on a surface of a conductive substrate with a trench through the top surface down to the substrate. Form a barrier layer over the dielectric layer including the exposed surface of the conductive substrate and the exposed sidewalls of the dielectric layer. Form a copper conductor over the barrier layer and overfilling the narrow hole in the trench. Etch away material from the surface of the copper conductor by a CMP process lowering the copper leaving a thin layer of copper over the barrier layer above the dielectric layer aside from the hole. Form a copper passivation by combining an element selected from silicon and germanium with copper on the exposed surfaces of the copper surfaces forming an interface in the narrower hole between the copper and the copper compound located below the dielectric top level. Etch away material from the surface of the copper compound and the barrier layer to planiarize the copper compound by etching down to the dielectric top level leaving a thin layer of the copper passivation compound covering the copper conductor in the narrower hole.

Claims

1. A method of forming a device on a surface of a conductive substrate comprising:

forming a dielectric layer over said surface, said dielectric layer having a top level;

forming a trench with sidewalls through said dielectric layer to expose a portion of said surface;

forming a barrier layer narrowing said trench and covering said surface and covering said top level and said sidewalls of said dielectric layer;

depositing copper as a blanket overfilling said narrow hole and covering said top level;

subtracting material from the surface of said copper leaving a thin layer of said copper covering said barrier layer and said dielectric layer,

forming a copper passivation combination with an element selected from silicon and germanium thereby lowering remaining portions of said copper below said dielectric top level in said narrow hole; and

planarizing said copper passivation combination to said top level leaving a thin layer of said compound covering said copper conductor in said narrow hole.

2. The method of claim 1, wherein:

said device is exposed to in situ to a material selected from silane (SiH₄) and germane (GeH₄) gas at a high temperature to form said copper passivation combination as a copper compound.

3. The method of claim 1, wherein:

said device is exposed to in situ to a material selected from silane (SiH₄) and gas to form said a copper passivation combination as a compound selected from copper silicide (Cu₅ Si) compound and copper germanide (Cu₃ Ge) compound, as a thin film passivation layer.

4. The method of claim 1, wherein:

said device is exposed to in situ to germane GeH₄ gas to form said copper passivation combination as a copper germanium film, and

said barrier layer comprises a material selected from the group consisting of tantalum, tantalum nitride, titanium nitride, tungsten nitride, tantalum/tantalum nitride, tantalum nitride/tantalum, tantalum/tantalum nitride/tantalum, and titanium/titanium nitride.

5. The method of claim 1, wherein said device is exposed to in situ exposure to germane GeH₄ gas in an atmosphere of hydrogen/helium (H₂ /He) gases at a temperature from about 200°

C. to about 400°

C. to form a copper germanide (Cu₃ Ge) compound, as a thin film adhesion layer, and

said barrier layer comprises a material selected from the group consisting of tantalum, tantalum nitride, titanium nitride, tungsten nitride, tantalum/tantalum nitride, tantalum nitride/tantalum, tantalum/tantalum nitride/tantalum, and titanium/titanium nitride.

6. The method of claim 1, wherein said device is exposed to in situ exposure to germane GeH₄ gas in an atmosphere of hydrogen/helium (H₂ /He) gases at a temperature from about 200°

C. to about 420°

C. to form a copper silicide (Cu₅ Si) compound, as a thin film adhesion layer, and

said barrier layer comprises a material selected from the group consisting of tantalum, tantalum nitride, titanium nitride, tungsten nitride, tantalum/tantalum nitride, tantalum nitride/tantalum, tantalum/tantalutm nitride/tantalum, and titanium/titanium nitride.

7. The method of claim 1, wherein said device is exposed to in situ to said silane SiH₄ gas mixed with nitrogen (N₂) gas at a temperature from about 350°

C. to about 400°

C. thermal flow to form a copper silicide compound.

8. The method of claim 1, wherein said device is implanted with silicon.

9. The method of claim 1, wherein after said device is implanted with silicon, the step is performed of employing a wet dip to remove oxide.

10. The method of claim 1, wherein said copper is deposited by plating in an environment of copper sulfate (CuSO₄) and water (H₂ O) plus some sulfuric acid (H₂ SO₄) and hydrochloric acid (HCl).

11. The method of claim 1, wherein said step of subtracting material comprises a Chemical Mechanical Planarization (CMP) process performed, preferably using an acid environment with an oxidation agent of hydrogen peroxide (H₂ O₂), nitric acid, hypochlorous acid, chromic acid, ammonia, ammonium salt, and a slurry of polishing agent such as alumina (Al₂ O₃) and deionized water (DI H₂ O) plus BTA (BenzoTriAzole).

12. The method of claim 1, wherein said step of planarizing comprises a Chemical Mechanical Planarization (CMP) process performed, preferably using an acid environment with an oxidation agent of hydrogen peroxide (H₂ O₂), nitric acid, hypochlorous acid, chromic acid, ammonia, ammonium salt, and a slurry of polishing agent such as alumina (Al₂ O₃) and deionized water (DI H₂ O) plus BTA (BenzoTriAzole).

13. The method of claim 1, wherein said copper is deposited by plating in an environment of copper sulfate (CuSO₄) and water (H₂ O) plus some sulfuric acid (H₂ SO₄) and hydrochloric acid (HCl),

said steps of subtracting material and planarizing comprise a Chemical Mechanical Planarization (CMP) process performed, preferably using an acid environment with an oxidation agent of hydrogen peroxide (H₂ O₂), nitric acid, hypochlorous acid, chromic acid, ammonia, ammonium salt, and a slurry of polishing agent such as alumina (Al₂ O₂) and deionized water (DI H₂ O) plus BTA (BenzoTriAzole).

14. A method of forming a copper conductor in a thin film electronic device over a conductive substrate with a top surface comprising:

forming a dielectric layer superjacent to said top surface of said conductive substrate, said dielectric layer having a top surface located at a dielectric top level,

patterning said dielectric layer to etch a hole therethrough with a dry plasma to etch a trench down to said conductive substrate exposing a portion of said top surface of said conductive substrate and forming exposed sidewalls of said dielectric layer,

forming a barrier layer composed of a material selected from the group consisting of tantalum and tantalum nitride,

said barrier layer being superjacent to, as follows;

a) said top surface of said conductive substrate,

b) said dielectric layer including said exposed top surface of said conductive substrate and said exposed sidewalls of said dielectric layer,

said barrier layer forming a narrower hole in said trench,

forming a copper conductor having a surface, said copper conductor being superjacent to said barrier layer, said copper conductor overfilling said narrower hole,

removing material from said surface of said copper conductor by a CMP etching process leaving a lowered copper surface with a thin layer of copper over said barrier layer above said top surface of said dielectric layer,

adding silicon or germanium to said copper forming an interface between said copper and said copper/silicon compound or copper/germanium compound located below said dielectric top level in said narrower hole in said trench, and

then subtracting material from the surface of said copper compound by a CMP etching process to planarize said copper compound down to said dielectric top level leaving a thin layer of said compound covering said copper conductor in said narrower hole.

15. The method of claim 14, wherein:

a copper compound is grown with an element selected from silicon and germanium by exposure of said copper conductor to a material selected from silane (SiH₄) and germane (GeH₄) gas at a high temperature to form said copper germanium film by a reaction with copper in said lowered copper surface, and

said device is exposed to in situ to said germane GeH₄ gas to form said copper germanide film.

16. The method of claim 14, wherein:

a film of a copper compound with germanium is grown by exposure of said copper conductor in situ to germane (GeH₄) gas at a high temperature from about 200°

C. to about 400°

C. to form said copper compound with germanium by a reaction with copper in said lowered copper surface to form a copper germanide (Cu₃ Ge) compound, as a thin film adhesion layer.

17. The method of claim 14, wherein:

a film of a copper compound with germanium is grown by exposure of said copper conductor in situ to germane (GeH₄,) gas at a high temperature from about 200°

C. to about 400°

C. in an atmosphere of hydrogen/helium (H₂ /He) gases to form said copper compound with germanium by a reaction with copper in said lowered copper surface to form a copper germanide (Cu₃ Ge) compound, as a thin film adhesion layer.

18. The method of claim 14, wherein:

said device is exposed in situ to silane SiH₄ gas to form a film of a copper silicide compound which is grown by exposure of said copper conductor to silane (SiH₄) gas at a high temperature to form said copper/silicon film by a reaction with copper in said lowered copper surface.

19. The method of claim 14, wherein:

said copper conductor is exposed in situ to silane SiH₄ gas at a temperature from about 200°

C. to about 420°

C. to form a film of a copper silicide (Cu₅ Si) compound by a reaction with copper in said lowered copper surface, as a thin film adhesion layer.

20. The method of claim 14, wherein:

a copper compound is grown with an element selected from silicon and germanium by exposure of said copper conductor to silane (SiH₄) gas at a high temperature to form said copper germanium film by a reaction with copper in said lowered copper surface, said copper conductor being exposed in situ to said silane SiH₄ gas at a temperature from about 200°

C. to about 420°

C., in an atmosphere of hydrogen/helium (H₂ /He) gases to form a copper silicide (Cu₅ Si) compound, as a thin film adhesion layer.

21. The method of claim 14, wherein:

a copper compound is grown with elemental silicon by exposure of said copper conductor to silane (SiH₄) germane (GeH₄) gas at a high temperature to form a copper silicide film by a reaction with copper in said lowered copper surface, said copper being exposed in situ to said silane SiH₄ gas mixed with nitrogen (N₂) gas at a temperature from about 350°

C. to about 400°

C. thermal flow to form a copper silicide compound.

22. The method of claim 14, wherein said device is implanted with silicon.

23. The method of claim 14, wherein after said device is implanted with silicon, the step is performed of employing a wet dip to remove oxide.

24. The method of claim 14, wherein said copper conductor is deposited by plating in an environment of copper sulfate (CuSO₄) and water (H₂ O) plus some sulfuric acid (H₂ SO₄) and hydrochloric acid (HCl).

25. The method of claim 14, wherein said step of subtracting material comprises a Chemical Mechanical Planarization (CMP) process performed, preferably using an acid environment with an oxidation agent of hydrogen peroxide (H₂ O₂), nitric acid, hypochlorous acid, chromic acid, ammonia, ammonium salt, and a slurry of polishing agent such as alumina (Al₂ O₃) and deionized water (DI H₂ O) plus BTA (BenzoTriAzole).

26. The method of claim 14, wherein said copper is deposited by plating in an environment of copper sulfate (CuSO₄) and water (H₂ O) plus some sulfuric acid (H₂ SO₄) and hydrochloric acid (HCl).

27. The method of claim 14, wherein said step of planarizing comprises a Chemical Mechanical Planarization (CMP) process performed, preferably using an acid environment with an oxidation agent of hydrogen peroxide, nitric acid, hypochlorous acid, chromic acid, ammonia, ammonium salt, and a slurry of polishing agent such as alumina and deionized water pus BenzoTriAzole.

28. The method of claim 26, wherein after said device is implanted with silicon, the step is performed of employing a wet dip to remove oxide.