Method and apparatus for setting the operating parameters of a computer system

• US 6,047,373 A
• Filed: 09/30/1997
• Issued: 04/04/2000
• Est. Priority Date: 01/02/1997
• Status: Expired due to Term

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: LeClerg, Frank E., Babcock, Sean R., Wildgrube, Frank L., Christeson, Orville H., Hall, Jerald N., Yuratovac, John, Kinion, Mike
• Primary Examiner(s): BUTLER, DENNIS
• Application Number:
  US08/940,636
• Time in Patent Office: 917 Days
• Field of Search: 713/1, 713/2, 713/100, 713/500, 713/501, 713/600
• US Class Current: 713/1
• CPC Class Codes: G06F 11/1433 during software upgrading
• CPC Class Codes: G06F 13/10 Program control for peripheral devices G06F13/14 - G06F13/42 take precedence
• CPC Class Codes: G06F 13/4068 Electrical coupling
• CPC Class Codes: G06F 9/4401 Bootstrapping security arrangements therefor G06F21/57

Abstract

An apparatus includes a configuration selector that is selectively configurable to denote one of a plurality of operating modes for the apparatus, including a configuration mode. The apparatus further comprising a programmable multiplexer, a processor, a bus, and a storage medium having stored therein a basic input/output system (BIOS) equipped to operate in any one of the plurality of operating modes, including the configuration mode wherein the BIOS facilitates user programming of a plurality of operating parameters for the apparatus. The programmable multiplexer, responsive to the configuration selector, asserts a default bus/core ratio common to a plurality of processors and buses that can be employed to form the apparatus when the configuration selector is configured to denote the configuration mode of operation. The processor, coupled to the storage medium and the programmable multiplexer, operates to execute the BIOS, in a speed consistent with the asserted bus/core ratio. The bus, coupled to the programmable multiplexer, the processor and the storage medium, operates to provide instructions and data to the processor, including the BIOS, in a speed consistent with the asserted bus/core ratio.

Claims

1. An apparatus comprising:

a configuration selector (CS) selectively configurable to denote one of a plurality of operating modes for the apparatus, including a configuration mode;

a programmable multiplexer, responsive to the CS, to assert a default bus/core ratio common to a plurality of processors and buses that can be employed to form the apparatus when the CS is configured to denote the configuration mode of operation;

a storage medium, responsive to the CS, having stored therein a basic input/output system (BIOS) equipped to operate in any one of the plurality of operating modes, including the configuration mode, wherein the BIOS operates to facilitate user programming of a plurality of operating parameters for the apparatus;

a processor, coupled to the storage medium and the programmable multiplexer, operates to execute the BIOS, in a speed consistent with the asserted bus/core ratio; and

a bus, coupled to the programmable multiplexer, the processor and the storage medium, operates to provide instructions and data to the processor, including the BIOS, in a speed consistent with the asserted bus/core ratio.

2. The apparatus of claim 1, wherein the plurality of processors are members of a family of processors having a corresponding plurality of processor operating speeds.

3. The apparatus of claim 1, wherein the plurality of buses are members of a family of buses having a corresponding plurality of bus operating speeds.

4. The apparatus of claim 1, wherein the default bus/core ratio is a minimal bus/core ratio accommodating any of the plurality of processors in combination with any of the plurality of buses.

5. The apparatus of claim 1, wherein the plurality of operating modes further includes a normal mode.

6. The apparatus of claim 5, wherein the programmable multiplexer is operative to assert a programmed bus/core ratio when the configuration selector denotes the normal mode.

7. The apparatus of claim 5, wherein when operating in the normal mode the BIOS configures the plurality of operating parameters of the apparatus in accordance with those programmed by the user in configuration mode.

8. The apparatus of claim 1, wherein the plurality of operating modes further includes an update mode.

9. The apparatus of claim 8, wherein the programmable multiplexer is operative to assert a programmed bus/core ratio when the configuration selector denotes the update mode.

10. The apparatus of claim 1, wherein the storage medium is a flash memory device.

12. The method of claim 10, wherein the method further comprises (e) asserting a programmed bus/core ratio from the programmable multiplexer if it is determined under (a), that the computer system is in an operating mode other than the configuration mode.

13. The method of claim 10, wherein the method further comprising (f) configuring the computer system in accordance with the plurality of user programmed operating parameters, if it is determined under (a), that the computer system is in a normal mode of operation.

11. A method for setting a plurality of operating parameters of a computer system, the method comprising:

(a) determining whether a configuration selector of the computer system denotes a configuration mode of operation;

(b) asserting a default bus/core ratio common to a plurality of processors and buses that can be employed to form the computer system from a programmable multiplexer, if it is determined under (a) that the computer system is to operate in the configuration mode of operation;

(c) executing a basic input/output system (BIOS) equipped to operate in the configuration mode of operation by a processor in a speed consistent with the asserted bus/core ratio, the processor being coupled to a bus that also operates in a speed consistent with the asserted bus/core ratio; and

(d) facilitating user programming of the plurality of operating parameters by the BIOS operating in the configuration mode of operation.