MOSFET device to reduce gate-width without increasing JFET resistance
First Claim
1. A vertical MOSFET transistor cell supported on a substrate of a first conductivity type functioning as a drain, the transistor cell comprising:
- a polysilicon gate disposed above said substrate substantially at a center potion of said transistor cell; and
a body-dopant implant blocking-mask covering said gate and extending a distance δ
over edges of said polysilicon gate thus defining a body-dopant implant window having a width equal to D-2δ
wherein D is a distance between a gate and a neighboring gate.
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Accused Products
Abstract
The present invention discloses a method for fabricating a MOSFET device supported on a substrate. The method includes the steps of (a) growing an oxide layer on the substrate followed by depositing a polysilicon layer and applying a gate mask for performing an undercutting dry etch for patterning a plurality of polysilicon gates with a gate width narrower than a width of the gate mask; (b) applying the gate mask as body implant blocking mask for implanting a body dopant followed by removing the gate mask and carrying out a body diffusion for forming body regions; (c) applying a source blocking mask for implanting a source dopant to form a plurality of source regions; (d) forming an overlying insulation layer covering the MOSFET device followed by applying a dry oxide etch with a contact mask as a second mask to open a plurality of contact openings there through then removing the contact mask; (e) performing a high temperature reflow process for the overlying insulation layer and for driving the source regions into designed junction depths; (f) depositing a metal layer followed by applying a metal mask for patterning the metal layer to define a plurality of metal segments.
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Citations
16 Claims
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1. A vertical MOSFET transistor cell supported on a substrate of a first conductivity type functioning as a drain, the transistor cell comprising:
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a polysilicon gate disposed above said substrate substantially at a center potion of said transistor cell; and a body-dopant implant blocking-mask covering said gate and extending a distance δ
over edges of said polysilicon gate thus defining a body-dopant implant window having a width equal to D-2δ
wherein D is a distance between a gate and a neighboring gate. - View Dependent Claims (2, 3, 4, 5)
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6. A vertical MOSFET transistor cell supported on a substrate of a first conductivity type functioning as a drain, the transistor cell comprising:
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a polysilicon gate disposed above said substrate substantially at a center potion of said transistor cell; a source-dopant implant-block comprising an oxide block on top of said substrate disposed in a mid portion between said gate and a neighboring gate wherein said oxide block having a width less than two times of a lateral diffusion length of a body dopant; a body-dopant implant blocking-mask covering said gate and extending a distance δ
over edges of said polysilicon gate thus defining a body-dopant implant window between edges of said body-dopant implant blocking mask and edges of said source-dopant implant-block having a width equal to D'"'"'-δ
wherein D'"'"' is a distance between edges of said gate and edges of said source-dopant implant-block. - View Dependent Claims (7, 8, 9, 10, 16)
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11. A vertical power transistor cell supported on a substrate of a first conductivity type functioning as a drain, the transistor cell comprising:
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a gate disposed above said substrate substantially at a center potion of said transistor cell; a source-dopant implant-block comprising an oxide block on top of said substrate disposed in a mid portion between said gate and a neighboring gate wherein said oxide block has a width larger than two times of a lateral diffusion length of a body dopant; and a body-dopant implant blocking-mask covering said gate and extending a distance δ
over edges of said polysilicon gate thus defining a body-dopant implant window between edges of said body-dopant implant blocking mask and edges of said source-dopant implant-block having a width equal to D'"'"'-δ
wherein D'"'"' is a distance between edges of said gate and edges of said source-dopant implant-block. - View Dependent Claims (12, 13, 14, 15)
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Specification