Integrated resonant tunneling diode based antenna

• US 6,049,308 A
• Filed: 03/27/1997
• Issued: 04/11/2000
• Est. Priority Date: 03/27/1997
• Status: Expired due to Fees

• Current Assignee: Sandia Corporation (Martin Marietta Corporation)
• Original Assignee: Sandia Corporation (Martin Marietta Corporation)
• Inventors: Hietala, Vincent M., Tiggers, Chris P., Plut, Thomas A.
• Primary Examiner(s): Le, Hoanganh
• Assistant Examiner(s): NGUYEN, HOANG V
• Application Number:
  US08/828,156
• Time in Patent Office: 1,111 Days
• Field of Search: 343/700 MS, 343/701, 343/721, 455/129, 455/326, 437/38
• US Class Current: 343/700.0MS
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: H01Q 21/0087 Apparatus or processes specially adapted for manufacturing antenna arrays manufacturing waveguides H01P11/00
• CPC Class Codes: H01Q 9/0442 with particular tuning means

Abstract

An antenna comprising a plurality of negative resistance devices and a method for making same comprising employing a removable standoff layer to form the gap between the microstrip antenna metal and the bottom contact layer.

Claims

1. An antenna comprising a plurality of negative resistance devices in the form of resonant tunneling diodes formed on an upper surface of a substrate;

at least one microstrip patch overlying the negative resistance devices and electrically connected thereto; and

a ground plane formed on the upper surface of the substrate proximate to the negative resistance devices.

2. The antenna of claim 1 comprising a microstrip patch antenna.

3. The antenna of claim 1 having a radiation efficiency of approximately five percent or greater.

4. The antenna of claim 1 wherein the microstrip patch is vertically spaced above the ground plane by approximately 20 μ

m or greater.

5. The antenna of claim 1 comprising a plurality of microstrip patch antennas each overlying a plurality of negative resistance devices further comprising resonant tunneling diodes.

6. An antenna comprising a plurality of resonant tunneling diodes formed on an upper surface of a substrate in an array with each of said resonant tunneling diodes being laterally spaced a distance away from a longitudinal center axis of said antenna, said distance being chosen to optimize performance of the antenna;

at least one microstrip patch overlying the resonant tunneling diodes and electrically connected thereto; and

a ground plane formed on the upper surface of the substrate proximate to the resonant tunneling diodes.

7. A method of manufacturing an antenna comprising the steps of:

a) providing a substrate having a double barrier heterostructure epitaxially grown on an upper surface of the substrate;

b) placing a resonant tunneling diode top contact over the upper surface of the substrate;

c) etching the substrate using the top contact as an etch mask and forming a resonant tunneling diode post;

d) adding a bottom contact layer for forming a ground plane on the upper surface of the substrate proximate to the resonant tunneling diode post;

e) depositing an electrically insulating standoff layer over the ground plane with the standoff layer extending upward above the top contact and having an opening in the standoff layer leaving exposed a portion of the resonant tunneling diode top contact;

f) depositing an antenna layer on the standoff layer, with the antenna layer extending into the opening in the standoff layer and forming an electrical connection to the top contact; and

g) removing the standoff layer, at least in part.

8. The method of claim 7 wherein the etching step comprises isotropic etching.

9. The method of claim 7 additionally comprising the step of adding a passivation layer to cover sidewalls of the resonant tunneling diode post.

10. The method of claim 9 wherein the step of adding the passivation layer comprises adding a silicon nitride dielectric layer.

11. The method of claim 7 wherein the step of depositing the standoff layer comprises depositing one or more layers of photoresist.

12. The method of claim 7 wherein the step of depositing a standoff layer comprises depositing a standoff layer of approximately 20 μ

m or greater in thickness.

13. The method of claim 7 wherein the step of depositing the antenna layer comprises the steps of:

a) depositing a layer of seed metal to form an electrical contact between a plurality of resonant tunneling diode top contacts;

b) patterning a plurality of posts on the layer of seed metal;

c) depositing support metal over the layer of seed metal;

d) removing the posts to form a plurality of access holes down to the layer of seed metal; and

e) milling through the seed metal at the locations of the access holes.

14. The method of claim 7 wherein the step of removing the standoff layer comprises oxygen plasma etching.

15. The method of claim 7 wherein the step of removing the standoff layer comprises forming access holes in the antenna layer.

16. The method of claim 7 wherein steps a) through g) are performed to form an electrically interconnected plurality of resonant tunneling diodes.

17. The method of claim 7 additionally comprising the step of forming a plurality of antennas and forming the antennas into an array of antennas.

18. An antenna comprising:

a) a semiconductor substrate having an upper surface;

b) a plurality of resonant tunnel diodes formed on the upper surface of the substrate;

c) a ground plane formed on the upper surface of the substrate proximate to the plurality of resonant tunnel diodes and electrically connected thereto;

d) a microstrip patch antenna formed above the resonant tunnel diodes and electrically connected thereto.

19. The antenna of claim 18 wherein the semiconductor substrate comprises gallium arsenide.

20. The antenna of claim 18 wherein the microstrip patch antenna is spaced from the ground plane by a distance in the range of 5-50 μ

m.

21. The antenna of claim 20 wherein the microstrip patch antenna is spaced from the ground plane by a distance of about 20 μ

m.

22. An antenna comprising:

a) a semiconductor substrate having an upper surface;

b) a plurality of resonant tunneling diodes formed on the upper surface of the substrate, and having a top ohmic contact;

c) a ground plane formed on the upper surface of the substrate proximate to the plurality of resonant tunnel diodes and electrically connected thereto; and

d) a microstrip patch antenna formed above the resonant tunnel diodes and electrically connected thereto.

23. An antenna comprising:

a) a semiconductor substrate having an upper surface;

b) a plurality of resonant tunneling diodes formed on the upper surface of the substrate, and having a top Schottky contact;

c) a ground plane formed on the upper surface of the substrate proximate to the plurality of resonant tunnel diodes and electrically connected thereto; and

d) a microstrip patch antenna formed above the resonant tunnel diodes and electrically connected thereto.

24. An antenna comprising:

a) a semiconductor substrate having an upper surface;

b) a plurality of resonant tunneling diodes formed on the upper surface of the substrate;

c) a ground plane formed on the upper surface of the substrate proximate to the plurality of resonant tunnel diodes and electrically connected thereto; and

d) a microstrip patch antenna formed above the resonant tunnel diodes and electrically connected thereto, with the microstrip patch antenna being supported by the plurality of resonant tunnel diodes, and further being supported by a plurality of dielectric support posts.

25. The antenna of claim 24 wherein the dielectric support posts comprise photoresist.

26. The antenna of claim 24 herein the dielectric support posts comprise polyimide.

27. An antenna comprising:

a) a semiconductor substrate having an upper surface;

b) a plurality of resonant tunneling diodes formed on the upper surface of the substrate, with the resonant tunneling diodes including a double heterostructure with a pair of tunneling barriers sandwiched about a quantum-well layer;

c) a ground plane formed on the upper surface of the substrate proximate to the plurality of resonant tunnel diodes and electrically connected thereto; and

d) a microstrip patch antenna formed above the resonant tunnel diodes and electrically connected thereto.

28. The antenna of claim 27 wherein the barriers comprise aluminum arsenide (AlAs) and the quantum-well layer comprises gallium arsenide (GaAs).