Controller for pulse width modulation circuit using AC sine wave from DC input signal

• US 6,049,471 A
• Filed: 10/27/1998
• Issued: 04/11/2000
• Est. Priority Date: 02/11/1998
• Status: Expired due to Fees

• Current Assignee: Microsemi Corp. - Analog Mixed Signal Group, Ltd. (Microchip Technology Incorporated)
• Original Assignee: PowerDsine Limited (Microchip Technology Incorporated)
• Inventors: Ferentz, Alon, Korcharz, Dror
• Primary Examiner(s): BERHANE, ADOLF D
• Application Number:
  US09/179,669
• Time in Patent Office: 532 Days
• Field of Search: 363/15, 363/16, 363/17, 363/20, 363/21, 363/40, 363/41, 363/131, 363/132, 363/89, 363/95, 363/98, 379/164, 379/252, 379/253, 379/418, 379/324, 379/413
• US Class Current: 363/20
• CPC Class Codes: H02M 1/0012 Control circuits using digital or numerical techniques in DC/DC converters H02M3/157, H02M3/33515; in DC-AC converters H02M7/53873
• CPC Class Codes: H02M 1/0022 the disturbance parameters being input voltage fluctuations
• CPC Class Codes: H02M 1/007 Plural converter units in cascade push-pull DC/DC converters with pre-regulator H02M3/3374; DC-AC converters following a DC-DC stage including a high frequency transformer H02M7/4807; DC-AC converters following a DC-DC conversion stage generating periodically varying voltages H02M7/4826
• CPC Class Codes: H02M 1/32 Means for protecting converters other than automatic disconnection
• CPC Class Codes: H02M 3/1588 comprising at least one synchronous rectifier element H02M3/1582, H02M3/1584 take precedence
• CPC Class Codes: H02M 3/33515 with digital control
• CPC Class Codes: H02M 3/33592 having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer
• CPC Class Codes: H02M 7/48 using discharge tubes with control electrode or semiconductor devices with control electrode
• CPC Class Codes: H04M 19/02 providing ringing current or supervisory tones, e.g. dialling tone or busy tone
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A pulse width modulation (PWM) controller suitable for use with a variety of open loop topology power supply circuits including ring generator circuits. The controller and the circuit realized therefrom utilizes an open loop topology to achieve the desired output voltage waveform. The PWM controller is suitable for realizing a plurality of different open loop converter topologies such as such as buck, boost, forward and push-pull topologies. The PWM controller is adapted to provide the required signals to control the various possible open loop converter topologies. The controller functions to generate a PWM signal that is used to generate a half wave sine wave signal. The controller includes the necessary functionality to control the duty cycle of the generated PWM signal so as to produce a full wave sine wave at the output of the output bridge circuit.

Claims

1. A controller for controlling a DC to AC open loop pulse width modulation (PWM) converter circuit, said controller comprising:

sampling means for generating a digital number representative of the magnitude of a source of electrical power, denoted by V_IN ;

output voltage generator means for generating a digital representation of a desired output voltage, denoted by V_OUT ;

processing means for determining the duty cycle D of a PWM signal as a function of K, N, V_IN and V_OUT ; and

pulse width modulation means for generating said PWM signal in response to the duty cycle generated by said processing means.

2. The controller according to claim 1, wherein said sampling means comprises A/D converter means.

3. The controller according to claim 1, wherein said output voltage generator means comprises a sine wave generator.

4. The controller according to claim 1, wherein said input voltage V_IN is an unregulated DC voltage.

5. The controller according to claim 1, wherein said processing means is operative to determine the duty cycle of a PWM signal adapted for use with an open loop converter having a buck topology, said processing means comprising a divider for dividing V_OUT by V_IN.

6. The controller according to claim 1, wherein said processing means is operative to determine the duty cycle of a PWM signal adapted for use with an open loop converter having a boost topology, said processing means comprising:

a summer for generating the sum V_OUT -V_IN ; and

a divider for dividing V_OUT by said sum.

7. The controller according to claim 1, wherein said processing means is operative to determine the duty cycle of a PWM signal adapted for use with an open loop converter having a forward topology, said processing means comprising:

a multiplier for generating the product N·

V_IN ; and

a divider for dividing V_OUT by said product.

8. The controller according to claim 1, further comprising bridge control means for generating a bridge control signal for converting a half wave sine function to a fill wave sine function, said bridge control signal having the same frequency as the sine wave output by said circuit.

9. The controller according to claim 1, further comprising buffer means coupled to the output of said pulse width modulation means, said buffer means for generating an output PWM signal with suitable drive and load characteristics.

10. A controller for controlling an open loop pulse width modulation (PWM) converter circuit having a buck topology, said circuit connected to a source of electrical power, said controller comprising:

sampling means for generating a digital representation of the voltage level of said source of electrical power denoted by V_IN ;

sine generator means for generating a digital representation of a sinusoidal waveform denoted by V_OUT ;

processing means for determining the duty cycle of a PWM signal in accordance with the following equation ##EQU38## wherein D=duty cycle of PWM signal

V_IN =voltage level of said source of DC electrical power

V_OUT =digital representation of a sinusoidal waveform;

pulse width modulation means for generating said PWM signal in response to the duty cycle generated by said processing means, said PWM signal output by said controller;

circuitry for generating a half wave sine wave in accordance with said PWM signal; and

output bridge circuitry for converting said half wave sine wave signal into a full wave sine function.

11. The controller according to claim 10, wherein said sampling means comprises A/D converter means.

12. The controller according to claim 10, wherein said sine generator means comprises counting means coupled to look up table means.

13. The controller according to claim 10, wherein said sine generator means comprises synchronous state machine means.

14. The controller according to claim 10, further comprising buffer means coupled to the output of said pulse width modulation means, said buffer means for generating an output PWM signal with suitable drive and load characteristics.

15. The controller according to claim 10, wherein said processing means is operative to determine the duty cycle of a PWM signal adapted for use with an open loop converter having a buck topology, said processing means comprising a divider for dividing V_OUT by V_IN.

16. A controller for controlling an open loop converter circuit having a boost topology, said circuit connected to a source of electrical power, said controller comprising:

sampling means for generating a digital representation of the voltage level of said source of electrical power denoted by V_IN ;

sine generator means for generating a digital representation of a sinusoidal waveform denoted by V_OUT ;

processing means for determining the duty cycle of a pulse width modulated (PWM) signal in accordance with the following equation ##EQU39## wherein D=duty cycle of PWM signal

V_IN =voltage level of said source of DC electrical power

V_OUT =digital representation of a sinusoidal waveform;

pulse width modulation means for generating said PWM signal in response to the duty cycle generated by said processing means, said PWM signal output by said controller;

circuitry for generating a half wave sine wave in accordance with said PWM signal; and

output bridge circuitry for converting said half wave sine wave signal into a full wave sine function.

17. The controller according to claim 16, wherein said sampling means comprises A/D converter means.

18. The controller according to claim 16, wherein said sine generator means comprises counting means coupled to look up table means.

19. The controller according to claim 16, wherein said sine generator means comprises synchronous state machine means.

20. The controller according to claim 16, further comprising buffer means coupled to the output of said pulse width modulation means, said buffer means for generating an output PWM signal with suitable drive and load characteristics.

21. The controller according to claim 16, wherein said processing means is operative to determine the duty cycle of a PWM signal adapted for use with an open loop converter having a boost topology, said processing means comprising:

a summer for generating the sum V_OUT -V_IN ; and

a divider for dividing V_OUT by said sum.

22. A controller for controlling an open loop converter circuit having a forward topology, said circuit connected to a source of electrical power and including a transformer having a primary and a secondary, said controller comprising:

sampling means for generating a digital representation of the voltage level of said source of electrical power denoted by V_IN ;

sine generator means for generating a digital representation of a sinusoidal waveform denoted by V_OUT ;

processing means for determining the duty cycle of a pulse width modulated (PWM) signal in accordance with the following equation ##EQU40## wherein D=duty cycle of PWM signal

N=turns ratio of said transformer

V_IN =voltage level of said source of DC electrical power

V_OUT =digital representation of a sinusoidal waveform;

pulse width modulation means for generating said PWM signal in response to the duty cycle generated by said processing means, said PWM signal output by said controller;

circuitry for generating a half wave sine wave in accordance with said PWM signal; and

output bridge circuitry for converting said half wave sine wave signal into a full wave sine function.

23. The controller according to claim 22, wherein said sampling means comprises A/D converter means.

24. The controller according to claim 22, wherein said sine generator means comprises counting means coupled to look up table means.

25. The controller according to claim 22, wherein said sine generator means comprises synchronous state machine means.

26. The controller according to claim 22, further comprising buffer means coupled to the output of said pulse width modulation means, said buffer means for generating an output PWM signal with suitable drive and load characteristics.

27. The controller according to claim 22, wherein said processing means is operative to determine the duty cycle of a PWM signal adapted for use with an open loop converter having a forward topology, said processing means comprising:

a multiplier for generating the product N·

V_IN ; and

a divider for dividing V_OUT by said product.

28. A method of controlling an open loop pulse width modulation (PWM) converter circuit, said method comprising the steps of:

generating a digital number representative of the magnitude of a source of DC electrical power denoted by V_IN ;

generating a digital representation of a sinusoidal waveform denoted by V_OUT ;

determining the duty cycle of a PWM signal; and

generating said PWM signal in response to the duty cycle generated by said processing means.

29. The method according to claim 28, wherein the step of determining the duty cycle of said PWM signal adapted for use with an open loop converter having a buck topology comprises the step of dividing V_OUT by V_IN.

30. The method according to claim 28, wherein the step of determining the duty cycle of a PWM signal adapted for use with an open loop converter having a boost topology comprises the steps of:

generating the sum V_OUT -V_IN ; and

dividing V_OUT by said sum.

31. The method according to claim 28, wherein the step of determining the duty cycle of a PWM signal adapted for use with an open loop converter having a forward topology comprises the steps of:

generating the product N·

V_IN ; and

dividing V_OUT by said product.

32. The method according to claim 28, further comprising the step converting a half wave sine function to a full wave sine function.

33. The method according to claim 28, further comprising the step of generating an output PWM signal with suitable drive and load characteristics.

34. A method of controlling an open loop pulse width modulation (PWM) converter circuit having a buck topology, said circuit connected to a source of electrical power, said method comprising the steps of:

generating a digital representation of the voltage level of said source of electrical power denoted by V_IN ;

generating a digital representation of a sinusoidal waveform denoted by V_OUT ;

determining the duty cycle of a PWM signal in accordance with the following equation ##EQU41## wherein D=duty cycle of PWM signal

V_IN =voltage level of said source of DC electrical power

V_OUT =digital representation of a sinusoidal waveform;

generating said PWM signal in response to the duty cycle generated in said step of determining;

generating a half wave sine wave in accordance with said PWM signal; and

converting said half wave sine wave signal into a full wave sine function.

35. A method of controlling an open loop converter circuit having a boost topology, said circuit connected to a source of electrical power, said method comprising the steps of:

generating a digital representation of the voltage level of said source of electrical power denoted by V_IN ;

generating a digital representation of a sinusoidal waveform denoted by V_OUT ;

determining the duty cycle of a pulse width modulated (PWM) signal in accordance with the following equation ##EQU42## wherein D=duty cycle of PWM signal

V_IN =voltage level of said source of DC electrical power

V_OUT =digital representation of a sinusoidal waveform;

generating said PWM signal in response to the duty cycle generated in said step of determining;

generating a half wave sine wave in accordance with said PWM signal; and

output bridge circuitry for converting said half wave sine wave signal into a full wave sine function.

36. A method of controlling an open loop pulse width modulation (PWM) converter circuit having a forward topology, said circuit connected to a source of electrical power and including a transformer having a primary and a secondary, said method comprising the steps of:

generating a digital representation of the voltage level of said source of electrical power denoted by V_IN ;

generating a digital representation of a sinusoidal waveform denoted by V_OUT ;

determining the duty cycle of a PWM signal in accordance with the following equation ##EQU43## wherein D=duty cycle of PWM signal

N=turns ratio of said transformer

V_IN =voltage level of said source of DC electrical power

V_OUT =digital representation of a sinusoidal waveform;

generating said PWM signal in response to the duty cycle generated in said step of determining;

generating a half wave sine wave in accordance with said PWM signal; and

converting said half wave sine wave signal into a fill wave sine function.