Non-lot based method for assembling integrated circuit devices

• US 6,049,624 A
• Filed: 02/20/1998
• Issued: 04/11/2000
• Est. Priority Date: 02/20/1998
• Status: Expired due to Term

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Wilson, Kevin, Hjorth, Ron
• Primary Examiner(s): Boudreau, Leo H.
• Assistant Examiner(s): Werner, Brian P.
• Application Number:
  US09/027,144
• Time in Patent Office: 781 Days
• Field of Search: 382/141, 382/145, 382/147, 382/148, 382/149, 702/80-84, 702/185, 702/187, 348/87, 348/126, 356/237.4, 356/237.5, 364/468.28, 364/468.23, 438/7, 438/15, 438/16, 250/559.44, 209/577
• US Class Current: 382/145
• CPC Class Codes: G05B 19/4183 characterised by data acquisition, e.g. workpiece identification
• CPC Class Codes: G05B 2219/31307 Identification structure is partly a copy of operating structure
• CPC Class Codes: G05B 2219/36371 Barcode reader
• CPC Class Codes: G05B 2219/45031 Manufacturing semiconductor wafers
• CPC Class Codes: H01L 21/67276 Production flow monitoring, e.g. for increasing throughput program-control systems per se G05B19/00, e.g. total factory control G05B19/418
• CPC Class Codes: H01L 21/67294 using identification means, e.g. labels on substrates or labels on containers
• CPC Class Codes: H01L 2223/5444 for electrical read out
• CPC Class Codes: H01L 2223/54473 for use after dicing
• CPC Class Codes: H01L 2223/5448 Located on chip prior to dicing and remaining on chip after dicing
• CPC Class Codes: H01L 2223/54486 Located on package parts, e.g. encapsulation, leads, package substrate
• CPC Class Codes: H01L 23/544 Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps test patterns for characterising or monitoring manufacturing processes H01L22/00
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: Y02P 90/02 Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

Abstract

An inventive method tracks IC devices through the assembly steps in a manufacturing process. Prior to die attach, a laser scribe marks the lead frame of each of the devices with a coded hole matrix that gives each device a unique ID code. During die attach, an optical hole reader retrieves the ID code of each of the IC devices, and a computer system stores the retrieved ID codes in association with the lot numbers of the ICs attached to the lead frames. The ID codes of the devices are then read at each step in assembly so the devices can be tracked through assembly individually, rather than by lots. As a result, the devices can proceed through assembly in a more efficient, continuous manner (i.e., without breaks between lots).

Claims

1. A method in an integrated circuit (IC) device manufacturing process for tracking multiple lots of IC devices through an assembly step in the process, each of the IC devices including a mounting substrate, the method comprising:

providing a mounting substrate;

providing an IC device;

placing an ID code on each of the IC devices;

placing a substantially unique mounting substrate ID code on the mounting substrate in a readable position thereon;

mounting the IC device on the mounting substrate;

reading the mounting substrate ID code of each of the IC devices in each of the multiple lots;

advancing the IC devices in the multiple lots through a series of assembly steps in the manufacturing process in a substantially continuous manner;

generating data related to the advancement of each of the IC devices through the assembly step; and

associating the data generated for each of the IC devices with the mounting substrate ID code of its associated IC device so the multiple lots of IC devices may be tracked through the assembly step.

2. The method of claim 1 wherein each of the IC devices includes a mounting substrate selected from a group comprising a lead frame and a printed circuit board, wherein each of the IC devices is selected from a group comprising lead frame IC devices, Chip-on-Board (COB) IC devices, and flip-chip IC devices.

3. The method of claim 1 wherein the mounting substrate of each of the IC devices is marked with a unique, optically retrievable mounting substrate ID code, wherein the step of reading the mounting substrate ID code of each of the IC devices comprises optically retrieving the mounting substrate ID code of each of the IC devices.

4. The method of claim 3 wherein each optically retrievable mounting substrate ID code comprises one of a bar code, an Optical Character Recognition (OCR) code, and a coded hole matrix and wherein the step of optically retrieving the mounting substrate ID code of each of the IC devices comprises retrieving the code of each of the devices with one of a bar code reader, an OCR reader, and an optical hole reader.

5. The method of claim 1 wherein an assembly step of the series of assembly steps in the IC device manufacturing process includes one of die attach, die cure, wire bond, molding, de-flash, lead finish, trim and form, and opens/shorts testing.

6. The method of claim 1 wherein the step of reading the mounting substrate ID code of each of the IC devices occurs before the step of advancing the IC devices through the assembly step in the manufacturing process.

7. The method of claim 1 wherein the step of advancing the IC devices through a series of assembly steps in the manufacturing process comprises advancing the IC devices serially through multiple machines associated with the series of assembly steps.

8. The method of claim 1 wherein the step of advancing the IC devices through a series of assembly steps in the manufacturing process comprises advancing the IC devices through parallel machines associated with the series of assembly steps.

9. The method of claim 1 wherein the step of generating data related to the advancement of each of the IC devices through the assembly step comprises generating at least one of assembly equipment data, assembly personnel data, assembly set-up data, and time and date data.

10. The method of claim 1, further comprising the step of storing the mounting substrate ID code of each of the IC devices after it is read and wherein the step of associating the data generated for each of the IC devices with the mounting substrate ID code of its associated IC device comprises storing the data generated for each of the IC devices in association with the stored mounting substrate ID code of its associated IC device.

11. The method of claim 10 wherein the step of storing the data generated for each of the IC devices in association with the stored mounting substrate ID code of its associated IC device comprises storing the data in a decentralized manner within a computer system so at least partial access to the stored data may continue during a failure of a centralized portion of the computer system.

12. A method of manufacturing integrated circuit (IC) devices, the method comprising:

providing a plurality of fabrication substrates in multiple lots;

fabricating a plurality of IC dice on each of the fabrication substrates;

separating each IC die of the plurality of IC dice on each of the fabrication substrates from its fabrication substrate to form one IC die of a plurality of IC dice;

providing a plurality of mounting substrates, each marked with a substantially unique mounting substrate identification (ID) code;

reading a front-end ID code associated with each IC die of the plurality of IC dice;

reading the mounting substrate ID code marked on each of the mounting substrates;

attaching each IC die of the plurality of IC dice to one of the mounting substrates to form one IC device of a plurality of IC devices;

storing the front-end ID code of each IC die of the plurality of IC dice in each of the IC devices in association with the mounting substrate ID code of the mounting substrate to which each IC die of the plurality of IC dice is attached;

advancing each IC device of the IC devices through assembly;

while advancing the IC devices through assembly;

advancing the IC devices through at least one assembly step in a substantially continuous manner;

generating data related to the advancement of each of the IC devices through the assembly step; and

associating the data generated for each of the IC devices with the mounting substrate ID code of the mounting substrate of each IC device of the IC devices so the IC devices may be tracked through the assembly step; and

back-end testing each IC device of the IC devices.

13. The method of claim 12, further comprising:

storing a back-end ID code of each IC device of the IC devices in association with the mounting substrate ID code of the mounting substrate to which each IC die of the IC dice is attached; and

storing back-end testing-related data for each IC device of the IC devices in association with the back-end ID code of each IC device of the IC devices so the IC devices may be tracked through back-end testing.

14. The method of claim 13 wherein the step of storing a back-end ID code of each IC device of the IC devices comprises storing at least one of a fuse ID code and a lot number.

15. The method of claim 13 wherein the front-end and back-end ID codes associated with each IC device of the IC devices are identical.

16. The method of claim 12 wherein the step of providing the fabrication substrates comprises providing substrates selected from a group comprising semiconductor wafers, Silicon-on-Sapphire (SOS) substrates, Silicon-on-Insulator (SOI) substrates, and Silicon-on-Glass (SOG) substrates.

17. The method of claim 12 wherein the step of fabricating a plurality of ICs on each of the fabrication substrates comprises fabricating ICs selected from a group comprising Dynamic Random Access Memory (DRAM) ICs, Static Random Access Memory (SRAM) ICs, Synchronous DRAM (SDRAM) ICs, processor ICs, Application Specific ICs (ASICs), Read Only Memory (ROM) ICs, and Electrically Erasable Programmable ROM (EEPROM) ICs.

18. The method of claim 12, further comprising the step of programming each IC die of the IC dice on each of the fabrication substrates to permanently store a substantially unique fuse ID code, wherein the step of reading a front-end ID code associated with each IC die of the IC dice comprises reading the fuse ID code programmed into the IC die of each of the IC dice.

19. The method of claim 18 wherein the step of programming each IC die of the IC dice on each of the fabrication substrates to permanently store a substantially unique fuse ID code comprises programming at least one of fuses and anti-fuses in each IC die of the IC dice on each of the fabrication substrates to permanently store each substantially unique fuse ID.

20. The method of claim 12 wherein the step of providing the mounting substrates includes marking each of the mounting substrates with an optically readable, substantially unique mounting substrate ID code selected from a group comprising a bar code, an Optical Character Recognition (OCR) code, and a coded hole matrix.

21. The method of claim 20 wherein each of the mounting substrates comprises one of a plurality of lead frames, wherein the step of marking each of the mounting substrates comprises laser scribing a coded hole matrix in a lead frame rail of each of the lead frames.

22. The method of claim 12 wherein the step of reading a front-end ID code associated with each IC die of the IC dice comprises reading at least one of a lot number, a wafer number, and a fuse ID code associated with each IC die of the IC dice.

23. The method of claim 12 wherein the step of reading the mounting substrate ID code marked on each of the mounting substrates comprises reading the mounting substrate ID codes with at least one of a bar code reader, an Optical Character Recognition (OCR) reader, and an optical hole reader.

24. The method of claim 12 wherein the step of reading the mounting substrate ID code includes verifying the mounting substrate ID code using a Cycle Redundancy Check (CRC).

25. The method of claim 12 wherein the step of providing the mounting substrates comprises providing at least one of lead frames and printed circuit boards.

26. The method of claim 12, further comprising the step of verifying that the IC devices are supposed to progress through the assembly step before advancing the IC devices through the assembly step.

27. The method of claim 12 wherein the step of attaching the IC dice comprises attaching the IC dice using at least one of a Chip-on-Board (COB) technique and a flip-chip technique.

28. A method of manufacturing multi-chip integrated circuit (IC) devices, the method comprising:

providing a plurality of fabrication substrates in multiple lots;

fabricating a plurality of IC dice on each of the fabrication substrates;

separating each IC die of the IC dice ICs on each of the fabrication substrates from its fabrication substrate to form one IC die of a plurality of IC dice;

providing a plurality of mounting substrates, each mounting substrate marked with a substantially unique mounting substrate identification (ID) code;

reading a front-end ID code associated with each IC die of the IC dice;

reading the mounting substrate ID code marked on each mounting substrate of the mounting substrates;

attaching more than one IC die of the IC dice to each mounting substrate of the mounting substrates to form a plurality of multi-chip IC devices;

storing the front-end ID code of each IC die of the IC dice in each of the multi-chip IC devices in association with the mounting substrate ID code of the mounting substrate to which each IC die of the IC dice is attached;

advancing each multi-chip device of the multi-chip IC devices through assembly;

while advancing the multi-chip IC devices through assembly;

advancing the multi-chip IC devices through at least one assembly step in a substantially continuous manner;

generating data related to the advancement of each of the multi-chip IC devices through the assembly step; and

associating the data generated for each of the multi-chip IC devices with the mounting substrate ID code of the mounting substrate of each multi-chip device so the multi-chip devices may be tracked through the assembly step; and

back-end testing each of the multi-chip IC devices.

29. The method of claim 28, further comprising:

storing a back-end ID code of each IC die of the IC dice in each multi-chip device of the multi-chip IC devices in association with the mounting substrate ID code of the mounting substrate to which each IC die of the IC dice is attached; and

storing back-end testing-related data for each IC device of the IC devices in association with the back-end ID code of each IC die of the IC dice so the IC dice may be tracked through back-end testing.

30. The method of claim 28 wherein the step of attaching more than one IC die of the IC dice to each of the mounting substrates to form a plurality of multi-chip IC devices comprises attaching more than one IC die of the IC dice to each of the mounting substrates to form a plurality of multi-chip IC devices selected from a group comprising Single In-Line Memory Modules (SIMMs), Dual In-Line Memory Modules (DIMMs), Multi-Chip Modules (MCMs), and multi-chip printed circuit (PC) boards.

31. A method of locating an individual integrated circuit (IC) die of an integrated circuit (IC) device having at least one IC die on an IC device manufacturing line on which a multitude of IC devices are being manufactured, the method comprising:

providing at least one IC die having an IC die identification code;

marking a mounting substrate of the at least one IC die with a substantially unique, optically-readable mounting substrate identification (ID) code;

mounting the at least one IC die on the mounting substrate to form an IC device;

when one IC device of the IC devices is being processed by an assembly-related machine, reading the mounting substrate ID code of the at least one IC die of the IC device and storing the code in association with a machine ID number of the assembly-related machine;

when one of the IC devices is stored in an IC device carrier, reading the mounting substrate ID code of the at least one IC die of the IC device and storing the code in association with a carrier ID number of the IC device carrier;

reading the carrier ID numbers of IC device carriers in which IC devices are stored and storing the carrier ID numbers in association with a location code identifying the location of the carriers on the manufacturing line; and

when an individual IC device is stored in an IC device carrier, locating the individual IC device on the manufacturing line by accessing the carrier ID number stored in association with the mounting substrate ID code of the at least one IC die of an individual IC device and by accessing the location code stored in association with the accessed carrier ID number; and

when an individual IC device is being processed by an assembly-related machine, locating the individual IC device on the manufacturing line by accessing the machine ID number stored in association with the mounting substrate ID code of the at least one IC die of an individual IC device.

32. The method of claim 31 wherein the step of reading the carrier ID numbers comprises reading carrier bar codes.

33. The method of claim 31 wherein the step of storing the carrier ID numbers in association with a location code identifying the location of the carriers on the manufacturing line comprises storing the carrier ID numbers in association with a location code identifying the location of the carriers as being a location selected from a group comprising on a storage shelf, in a storage bin, mounted to feed IC devices into an assembly-related machine, and mounted to receive processed IC devices from an assembly-related machine.