Method of forming a semiconductor structure with uniform threshold voltage and punch-through tolerance

• US 6,051,468 A
• Filed: 09/15/1997
• Issued: 04/18/2000
• Est. Priority Date: 09/15/1997
• Status: Expired due to Term

• Current Assignee: Alpha & Omega Semiconductor, Ltd.
• Original Assignee: MagePower Semiconductor Corporation
• Inventors: Hshieh, Fwu-Iuan
• Primary Examiner(s): Nguyen, Tuan H.
• Assistant Examiner(s): Brewster, William M.
• Application Number:
  US08/929,751
• Time in Patent Office: 946 Days
• Field of Search: 438/138, 438/270, 438/302, 438/525, 438/589, 438/268, 438/269, 438/271, 438/272, 438/273, 438/274, 257/330, 257/331, 257/332, 257/333, 257/334
• US Class Current: 438/270
• CPC Class Codes: H01L 21/26586 characterised by the angle between the ion beam and the crystal planes or the main crystal surface
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A MOSFET (Metal Oxide Semiconductor Field Effect Transistors) structure is fabricated by first forming a plurality of trenches in a semiconductor substrate which includes a major surface. The trenches are then lined with insulating material and thereafter filled with conductive material. The process of filling the conductive material in the trenches normally involves an over-etching step for preventing any residual material remaining on the major surface. The over-etching of the conductive material in the trenches alters the evenness of the major surface and presents a problem for the later angular ion implantation of the source layer. As a consequence, the source layer formed includes asymmetrical source segments which generates nonuniform threshold voltage and punch-through tolerance in the MOSFET structure. The inventive method provides a spacer layer to compensate for the unevenness of the major surface. Prior to the ion implantation of the source layer, the spacer layer is formed above the conductive material and surrounding the insulating material adjacent the major surface. Source segments thus formed are symmetrical in shape enabling the fabricated MOSFET structure to operate with uniform punch-through tolerance, uniform threshold voltage, and uniform current distribution during normal operation.

Claims

1. A method of forming a semiconductor structure, comprising the steps of:

(a) providing a substrate with a major surface;

(b) forming at least one trench in said substrate extending from said major surface;

(c) lining said trench with insulating material;

(d) filling said trench with conductive material;

(e) forming a spacer layer above said conductive material and surrounding said insulating material adjacent said major surface;

(f) patterning a masking layer over said substrate; and

(g) implanting a diffusion layer in said substrate through said masking and spacer layers.

2. The method of forming a semiconductor substrate as set forth in claim 1 wherein said masking layer in step (f) is a second masking layer, step (e) includes the substeps of:

(i) depositing a first masking layer over said major surface covering said conductive material; and

(ii) etching said first masking layer such that portions of said first masking layer remain above said conductive material and surrounding said insulating material adjacent said major surface.

3. The method of forming a semiconductor substrate as set forth in claim 1 further comprising the steps of:

(h) removing said masking layer;

(i) patterning an insulating layer over said conductive material and said spacer layer; and

(j) patterning a conductive layer c)ver said substrate and said insulating layer.

4. The method of forming a semiconductor substrate as set forth in claim 1 wherein said layer of masking material in step (f) is formed prior to step (b), and wherein step (g) includes implanting said diffusion layer in said substrate through said masking and spacer layers as a body layer, said method further including implanting a second diffusion layer as a source layer in said substrate through said masking and spacer layers.

5. The method of forming a semiconductor substrate as set forth in claim 1 further including the steps of:

(h) depositing a refractive material layer over said substrate, said refractive material layer reacts with said conductive material and said diffusion layer to form composite layers; and

(i) removing said refractive material layer such that selected segments of said composite layers remain over said conductive material and said diffusion layer.

6. The method of forming a semiconductor substrate as set forth in claim 5 further comprising the steps of:

(j) removing said masking layer;

(k) patterning an insulating layer over said conductive material and said spacer layer; and

(l) patterning a conductive layer over said substrate and said insulating layer.

7. The method of forming a semiconductor structure as set forth in claim 5 wherein said refractive material layer includes titanium, said substrate includes silicon, and said composite layers include titanium silicide.

8. The method of forming a semiconductor structure as set forth in claim 1 wherein step (g) includes implanting said diffusion layer in said substrate directing an implant ion beam angularly with respect to the normal to said major surface.

9. A method of forming a cell array, comprising the steps of:

(a) providing a substrate of a first conductivity type;

said substrate includes a major surface;

(b) forming a plurality of trenches in said substrate extending from said major surface;

(c) lining said trenches with insulating material;

(d) filling said trenches with conductive material;

(e) forming a spacer layer over said conductive material and surrounding said insulating material adjacent said major surface;

(f) forming a masking layer over said major surface; and

(g) implanting a source layer of said first conductivity type in said substrate through said masking and spacer layers.

10. The method of forming a semiconductor structure as set forth in claim 9 wherein step (d) includes filling said trenches with conductive material below said major surface thereby exposing steps of said substrate above said conductive material, said masking layer in step (f) is a second masking layer, and step (e) includes the substeps of:

(i) depositing a first masking layer over said major surface covering said conductive material; and

(ii) etching said first masking layer such that portions of said first masking layer remain on the sidewalls of said steps as said spacer layer above said conductive material and surrounding said insulating layer.

11. The method of forming a semiconductor substrate as set forth in claim 10 further including the step of forming a body layer of a second conductivity type in said substrate prior to step (e) and wherein step (g) includes implanting said source layer in said body layer.

12. The method of forming a semiconductor structure as set forth in claim 11 wherein step (g) includes implanting said diffusion layer in said substrate by directing an implant ion beam angularly with respect to the normal of said major surface.

13. The method of forming a semiconductor substrate as set forth in claim 12 further comprising the steps of:

(h) removing said second masking layer;

(i) patterning an insulating layer over said conductive material and said spacer layer; and

(j) patterning a conductive layer over said substrate and said insulating layer.

14. The method of forming a semiconductor substrate as set forth in claim 10 wherein said second masking layer in step (f) is formed prior to step (b), and wherein said method further including the step of implanting a body layer of a second conductivity type in said substrate through said masking and spacer layers and thereafter diffusing said body layer downward and sideward in said substrate prior to step (g).

15. The method of forming a semiconductor substrate as set forth in claim 14 further comprising the steps of:

(h) removing said second masking layer;

(i) patterning an insulating layer over said conductive material and said spacer layer; and

(j) patterning a conductive layer over said substrate and said insulating layer.

16. The method of forming a semiconductor substrate as set forth in claim 14 further including the steps of:

(h) depositing a refractive material layer over said substrate, said refractive material layer reacts with said conductive material and said diffusion layer to form composite layers; and

(i) removing said refractive material layer such that selected segments of said composite layers remain over said conductive material and said diffusion layer.

17. The method of forming a semiconductor substrate as set forth in claim 16 further comprising the steps of:

(j) removing said second masking layer;

(k) patterning an insulating layer over said conductive material and said spacer layer; and

(l) patterning a conductive layer over said substrate and said insulating layer.

18. The method of forming a semiconductor structure as set forth in claim 17 wherein said refractive material layer includes titanium, said substrate includes silicon, and said composite layers include titanium silicide.

19. A method for forming a semiconductor structure, comprising the step of:

(a) providing a substrate having a major surface;

(b) patterning a first masking layer over said substrate;

(c) forming at least one trench in said substrate extending beyond said major surface;

(d) lining said at least one trench with insulating material;

(e) filling said at least one trench with conductive material;

(f) forming a spacer layer above said conductive material and surrounding said insulting material adjacent said major surface;

(g) implanting a body layer in said substrate through said masking and spacer layers;

(h) diffusing said body layer downwardly and sidewardly so as to merge portions of said body layer under said masking and spacer layers together; and

(i) implanting a source layer in said substrate through said masking and spacer layers.

20. The method of forming a semiconductor substrate as set forth in claim 19 further including the steps of:

(j) depositing a refractive material layer over said substrate, said refractive material layer reacts with said conductive material and said source layer to form composite layers; and

(k) removing said refractive material layer such that selected segments of said composite layers remain over said conductive material and said source layer.

21. The method of forming a semiconductor structure as set forth in claim 20 wherein said refractive material includes titanium, said substrate includes silicon, and said composite layers include titanium silicide.