Low voltage variable gain amplifier with feedback

• US 6,052,030 A
• Filed: 05/04/1998
• Issued: 04/18/2000
• Est. Priority Date: 05/04/1998
• Status: Expired due to Term

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: Lucent Technologies, Inc. (Nokia Corporation)
• Inventors: Kim, Helen, Garner, William J.
• Primary Examiner(s): Pascal, Robert
• Assistant Examiner(s): NGUYEN, KHANH V
• Application Number:
  US09/072,149
• Time in Patent Office: 715 Days
• Field of Search: 330/282, 330/86, 330/98, 330/99, 330/310, 330/311
• US Class Current: 330/282
• CPC Class Codes: H03G 1/007 using FET type devices

Abstract

An amplifier with negative feedback, disposed in an integrated circuit arrangement, comprises an input amplification stage, configured to receive an input signal. A feedback stage configured to receive the output signal provided by the amplification stage, and provide a corresponding feedback signal to the amplification stage. A driver stage, coupled to the input stage, configured to receive the output signal provided by the amplification stage, and provide the output signal of the amplifier.

Claims

1. A variable gain amplifier comprising:

an input amplification stage for receiving an input signal and providing an amplified output signal;

a feedback stage for receiving said amplified output signal provided by said input amplification stage, and providing as a function thereof a feedback signal to said input amplification stage; and

a driver stage, coupled to said input amplification stage, configured to receive said amplified output signal provided by said input amplification stage, and provide the output signal of said variable gain amplifier.

2. An amplifier in accordance with claim 1 wherein said function is developed as a variable resistance.

3. An amplifier in accordance with claim 2 wherein said variable resistance is implemented by a transistor.

4. An amplifier in accordance with claim 3 wherein said variable resistance is controlled by a signal supplied from outside said amplifier.

5. An amplifier in accordance with claim 1 wherein said feedback stage provides a variable feedback signal.

6. An amplifier in accordance with claim 5 wherein said feedback signal is generated by a variable resistance.

7. An amplifier in accordance with claim 5 wherein said variable feedback signal is generated by a transistor coupled between the output port of said feedback stage and the input port of said input amplification stage.

8. An amplifier in accordance with claim 7 wherein said transistor coupled between the output ports of said feedback stage and the input port of said input amplification stage is a MOSFET transistor providing a variable resistance across its drain and source terminals in response to input voltage signals provided at its gate terminal.

9. An amplifier in accordance with claim 7 wherein said input amplification stage comprises an input transistor configured to amplify input signals provided to said input transistor.

10. An amplifier in accordance with claim 9 wherein said feedback stage comprises a feedback transistor, configured to receive amplified signals generated by said input transistor.

11. An amplifier in accordance with claim 10 wherein said driver stage comprises a transistor configured to receive said amplified signals generated by said input transistor.

12. An amplifier in accordance with claim 11 wherein said transistor coupled between the output port of said feedback stage and the input port of said input amplification stage is a MOSFET transistor providing a variable resistance across its drain and source terminals in response to input voltage signals provided at its gate terminal.

13. An amplifier in accordance with claim 12 wherein said transistors in said input amplification stage, said feedback stage and said driver stage are bipolar transistors.

14. A multiple stage amplifier comprising a plurality of amplifiers in accordance with claim 13, wherein said amplifiers are coupled in a cascade arrangement.

15. An amplifier in accordance with claim 13 disposed in an integrated circuit arrangement.

16. A wireless terminal having an intermediate frequency amplifier comprising:

an input amplification stage configured to receive an input signal having an intermediate frequency (IF) range and to provide an amplified output signal;

a feedback stage configured to receive the amplified output signal provided by said amplification stage, and provide a corresponding feedback signal to said amplification stage, said feedback signal being responsive to a feedback control signal;

a driver stage coupled to said input amplification stage configured to receive said amplified output signal provided by said input amplification stage, and provide the output signal of said intermediate frequency amplifier; and

a signal processing circuit configured to receive a signal corresponding to said output signal of said intermediate frequency amplifier and provide said feedback control signal to said feedback stage.

17. A wireless terminal in accordance with claim 16 wherein said feedback stage provides a variable feedback signal.

18. A wireless terminal in accordance with claim 17 wherein said variable feedback signal is generated by a transistor coupled between the output port of said feedback stage and the input port of said input amplification stage.

19. A wireless terminal in accordance with claim 18 wherein said transistor coupled between the output port of said feedback stage and the input port of said input amplification stage is a MOSFET transistor providing a variable resistance across its drain and source terminals in response to said feedback control voltage signals provided at its gate terminal.

20. A wireless terminal in accordance with claim 19 wherein said input amplification stage comprises an input transistor configured to amplify input signals provided to said input transistor.

21. A wireless terminal in accordance with claim 20 wherein said feedback stage comprises a feedback transistor, configured to receive amplified signals generated by said input transistor.

22. A wireless terminal in accordance with claim 21 wherein said driver stage comprises a transistor configured to receive said amplified signals generated by said input transistor.

23. A wireless terminal in accordance with claim 22 wherein said transistor coupled between the output port of said feedback stage and the input port of said input amplification stage is a MOSFET transistor providing a variable resistance across its drain and source terminals in response to said feedback control voltage signals provided at its gate terminal.

24. An amplifier in accordance with claim 23 wherein said transistors in said input amplification stage, said feedback stage and said driver stage are bipolar transistors.

25. An amplifier comprising:

an input amplification means for receiving and amplifying an input signal, said input amplification means including an output port for providing an amplified output signal;

a biasing means coupled to said input amplification means for providing a substantially fixed biasing voltage at said output port of said input amplification means;

a feedback means coupled to said biasing means for receiving said amplified output signal provided by said input amplification means via said biasing means, and providing a corresponding feedback signal to said input amplification means; and

a driver means coupled to said input amplification means via said biasing means for receiving said amplified output signal provided by said amplification means, and providing the output signal of said amplifier.

26. An amplifier in accordance with claim 25 wherein said feedback means provides a variable feedback signal.

27. An amplifier in accordance with claim 26 wherein said variable feedback signal is generated by at least one transistor coupled between the output port of said feedback means and the input port of said input amplification means.

28. An amplifier in accordance with claim 27 wherein said at least one transistor coupled between the output ports of said feedback means and the input port of said input amplification means is a MOSFET transistor providing a variable resistance across its drain and source terminals in response to input voltage signals provided at its gate terminal.

29. An amplifier in accordance with claim 28 wherein said input amplification means comprises an input transistor configured to amplify input signals provided to said input transistor.

30. An amplifier in accordance with claim 29 wherein said feedback means comprises a feedback transistor, configured to receive amplified signals generated by said input transistor via said biasing means.

31. An amplifier in accordance with claim 30 wherein said driver means comprises a transistor configured to receive said amplified signals generated by said input transistor.

32. An amplifier in accordance with claim 31 wherein said transistor coupled between the output port of said feedback means and the input port of said input amplification means is a MOSFET transistor providing a variable resistance across its drain and source terminals in response to input voltage signals provided at its gate terminal.

33. An amplifier in accordance with claim 32 wherein said transistors in said input amplification means, said feedback means and said driver means are bipolar transistors.

34. A multiple stage amplifier comprising a plurality of amplifiers in accordance with claim 32, wherein said amplifiers are coupled in a cascade arrangement.

35. An amplifier in accordance with claim 33 wherein said biasing means comprises a PMOS source follower transistor and a current source, wherein said source follower is coupled to a DC power supply signal source via said current source.

36. A method for providing variable gain amplification comprising the steps of:

receiving and amplifying an input signal via an input amplification means, and providing an amplified version of said input signal;

providing a substantially fixed biasing voltage via a biasing means at an output port of said amplification means;

receiving said amplified version of said input signal provided by said input amplification means via said biasing means, and providing a corresponding feedback signal to said input amplification means; and

receiving said amplified version of said input signal provided by said amplification means, and providing the output signal of said amplifier via a driving means.

37. The method in accordance with claim 36 further comprising the step of providing a variable feedback signal.

38. The method in accordance with claim 37 wherein said step of providing a variable feedback signal comprises varying a resistance across a drain a source terminal of a MOSFET transistor.