Pointer register indirectly addressing a second register in the processor core of a digital processor
First Claim
1. An integrated circuit having a digital processor comprising a first register and a second register, wherein the first and second registers are located inside a processor core of the digital processor and the first register is adapted to store a pointer corresponding directly to a register address of the second register without having to be converted through a memory space corresponding to memory located outside of the processor core, such that the second register can be indirectly addressed using the pointer in the first register, wherein:
- the first register is adapted to selectively store the pointer, a data value, or a memory address in the memory space; and
the second register is adapted to selectively store a data value or a memory address in the memory space.
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Accused Products
Abstract
A first register stores a value that can be used as a pointer to indirectly address a second register. The first register is referred to as a pointer register and the pointer as a register pointer. The second register may be a conventional register that stores a conventional register value (i.e., a data value or a pointer to a data value stored in external memory) or another pointer register. In certain embodiments, a pointer register can also be used to store conventional register values. Pointer registers of the present invention can be used to implement efficiently certain types of digital processing, such as circular buffers, vector processing, convolutional processing, and partitioned processing, using data in registers rather than memory.
93 Citations
19 Claims
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1. An integrated circuit having a digital processor comprising a first register and a second register, wherein the first and second registers are located inside a processor core of the digital processor and the first register is adapted to store a pointer corresponding directly to a register address of the second register without having to be converted through a memory space corresponding to memory located outside of the processor core, such that the second register can be indirectly addressed using the pointer in the first register, wherein:
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the first register is adapted to selectively store the pointer, a data value, or a memory address in the memory space; and the second register is adapted to selectively store a data value or a memory address in the memory space. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
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Specification