Surface-connectable semiconductor bridge elements and devices including the same

• US 6,054,760 A
• Filed: 12/23/1996
• Issued: 04/25/2000
• Est. Priority Date: 12/23/1996
• Status: Expired due to Fees

• Current Assignee: Ensign-Bickford Aerospace & Defense Company (Incitec Pivot Limited)
• Original Assignee: SCB Technologies, Inc.
• Inventors: Martinez-Tovar, Bernardo, Montoya, John A.
• Primary Examiner(s): Whitehead, Jr., Carl
• Assistant Examiner(s): POTTER, ROY KARL
• Application Number:
  US08/771,536
• Time in Patent Office: 1,219 Days
• Field of Search: 257/692, 257/778, 257/786, 257/737, 102/202.7, 102/202.5
• US Class Current: 257/692
• CPC Class Codes: F42B 3/13 with semiconductive bridge
• CPC Class Codes: F42B 3/198 of electric initiator heads e.g., testing, machines
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details

Abstract

A semiconductor element, e.g., a semiconductor bridge element (30), is surface mountable as it has thereon a metal layer comprised of metal lands (44) and electrical connectors 45a, 45b and 45c) which terminate in flat electrical contacts (47) on the back surface (35) of the element. Optionally, the element may also contain back-to-back zener diodes (46a, 46b) to provide unbiased protection against electrostatic discharge. When configured as a semiconductor bridge element (30), the element, among other uses, finds use as an igniter (13) for an explosive element. The elements may be made by a method including a cross-cut technique in which grooves (60) cut in the front surface (58) of a silicon wafer substrate (56) intersect grooves (64) cut in the back surface (62) of the wafer. The intersecting grooves (60,64) form a plurality of apertures in the wafer (56), the apertures and grooves helping to define a plurality of dies having side surfaces. A dielectric layer (48) is deposited on the wafer (56) and a polysilicon film (52) is deposited over the dielectric layer (48). A metal layer (44, 45a-45c, and 47) is then deposited on the wafer while it is still intact to provide an electrical connection from the top surface (34) of element (30) along the side surfaces (66a, 66b and 66c, and 68a, 68b and 66c) to the bottom surface (35) to constitute the dies as the semiconductor elements (30). The elements (30) are separated and the electrical contacts (47) of a given element can be mounted directly to a header (36) or the like by soldering, without need for connector wires (14).

Claims

1. A surface-connectable semiconductor element comprising:

(a) a substrate made from silicon semiconductor material having a top surface, a bottom surface and side surfaces;

(b) a dielectric layer disposed on at least one surface of the substrate;

(c) a polysilicon film disposed on the dielectric layer;

(d) a metal layer mounted on the polysilicon layer and extending from the top surface, along the side surfaces, to the bottom surface with the metal layer configured to form contacts on the bottom surface which contacts are configured for surface mounting directly on a header; and

wherein the substrate is selected from the class consisting of p-type substrates and n-type substrates and the polysilicon film and the side surfaces of the substrate are doped with a dopant selected from the class consisting of a p-dopant and an n-dopant, provided that when the substrate comprises a p-dopant the polysilicon film and the side surfaces are doped with an n-dopant, and when the substrate comprises an n-dopant the polysilicon film and the side surfaces are doped with a p-dopant, whereby back-to-back diode means are formed between different ones of the side surfaces to provide the semiconductor element with unbiased protection against electrostatic discharge.

4. The element of claim 1 comprising a semiconductor bridge element wherein the polysilicon film and the metal layer are configured to provide at least two separate electrical contacts on the bottom surface and a semiconductor bridge circuit geometry on the front surface.

5. The element of claim 1 wherein the silicon substrate comprises a p-type silicon substrate and the polysilicon film and the side surfaces are doped with an n-type dopant.

6. The element of claim 1 wherein the silicon substrate comprises an n-type silicon substrate and the polysilicon film and the side surfaces are doped with a p-type dopant.

8. The element of claim 1 or claim 2 wherein at least one side surface includes a stepped portion.

9. The element of claim 1, claim 4 or claim 2 wherein the substrate has a resistivity in the range of from about 0.01 to 10 ohm-cm, the dielectric layer has a thickness in the range of from about 0.2 to 1 micrometer, and the polysilicon film has a thickness in the range of from about 1 to 3 micrometers.

10. The element of claim 1, claim 4 or claim 2 in combination with a header having electrical contacts, wherein the element is surface mounted directly on the header by soldering the contacts of the bottom surface of the element to the electrical contacts of the header.

11. The element of claim 1, claim 4 or claim 2 forming part of an explosive element and having the bridge circuit geometry thereof disposed in contact with an explosive material.

12. The element of claim 1 or claim 3 wherein the metal layer is configured to provide at least two respective sections, each extending continuously from the top surface, along at least one of the side surfaces to the bottom surface and forming at least one contact on the bottom surface.

13. The element of claim 1 or claim 3 comprising a semiconductor bridge element wherein the polysilicon film and the metal layer are configured to provide at least two separate electrical contacts on the back surface and a semiconductor bridge circuit geometry on the front surface.

2. A surface-connectable semiconductor bridge element comprising:

(a) a substrate made from silicon semiconductor material having a top surface, a bottom surface and side surfaces;

(b) a dielectric layer disposed on at least one surface of the substrate;

(c) a polysilicon film disposed on the dielectric layer; and

(d) a metal layer mounted on the polysilicon layer and extending from the top surface, along the side surfaces to the bottom surface wherein the metal layer is configured to be in contact with at least a portion of one surface of the substrate, and wherein the metal layer is configured to form contacts on the bottom surface which contacts are configured for surface mounting directly on a header;

wherein the polysilicon film and the metal layer are configured to provide at least two separate electrical contacts on the bottom surface and a semiconductor bridge circuit geometry on the front surface.

3. A surface-connectable semiconductor element comprising:

(a) a substrate made from silicon semiconductor material having a top surface, a bottom surface and side surfaces;

(b) a dielectric layer disposed on at least one surface of the substrate;

(c) a polysilicon film disposed on the dielectric layer; and

(d) a metal layer mounted on the polysilicon layer and extending from the top surface, along the side surfaces, to the bottom surface with the metal layer configured to form contacts on the bottom surface which contacts are configured for surface mounting directly on a header;

the element being made by manufacturing it as part of a plurality of such semiconductor elements from a substrate wafer having a front surface and a back surface, the elements being made by a method comprising the steps of;

(a) coating at least one surface of a silicon substrate wafer with a dielectric layer;

(b) depositing a polysilicon film on the dielectric layer;

(c) forming a plurality of openings in the substrate wafer, which openings extend through the wafer from the front surface to the back surface thereof to define side surfaces which extend from the front surface to the back surface of the wafer, the openings being located so that a plurality of dies to be cut from the substrate wafer each has an opposed pair of the side surfaces;

(d) depositing a metal layer on the wafer and through the openings onto the front, back and side surfaces to provide a continuous electrically conductive path on the dies between the front surface and the back surface via the side surfaces to constitute the semiconductor elements from the dies;

(e) masking and etching the polysilicon film and the metal layer to form the contacts on the bottom surface; and

(f) separating the semiconductor elements from the substrate wafer and from each other.

7. The element of claim 3 comprising a semiconductor bridge element made by a method wherein step (e) comprises masking and etching the polysilicon film and the metal layer to form at least two separate electrical contacts on the bottom surface and a semiconductor bridge circuit geometry on the front surface.