Antireflective siliconoxynitride hardmask layer used during etching processes in integrated circuit fabrication

• US 6,060,380 A
• Filed: 11/06/1998
• Issued: 05/09/2000
• Est. Priority Date: 11/06/1998
• Status: Expired due to Term

• Current Assignee: GlobalFoundries, Inc.
• Original Assignee: Advanced Micro Devices, Inc.
• Inventors: Wang, Fei, Subramanian, Ramkumar, Singh, Bhanwar, Chan, Simon
• Primary Examiner(s): Niebling, John F.
• Assistant Examiner(s): GURLEY, LYNNE ANN
• Application Number:
  US09/187,391
• Time in Patent Office: 550 Days
• Field of Search: 438/618, 438/622, 438/624, 438/666, 438/667, 438/671, 438/672, 438/669
• US Class Current: 438/618
• CPC Class Codes: H01L 21/31144 using masks
• CPC Class Codes: H01L 21/76811 involving multiple stacked pre-patterned masks
• CPC Class Codes: H01L 21/76813 involving a partial via etch

Abstract

A method for etching openings in an integrated circuit uses siliconoxynitride as a hardmask layer. Because of the relatively low reflectivity of siliconoxynitride, when a photoresist layer is deposited on the siliconoxynitride hardmask layer and is exposed to light, the photoresist layer is patterned more conformingly to a desired pattern. The present invention may be used to particular advantage for etching contiguous trench lines and via holes in a dual damascene etch process for small dimension integrated circuits.

Claims

1. A method for etching a plurality of openings in multiple levels in an integrated circuit, the method including the steps of:

A. depositing an antireflective hardmask layer over a first insulating layer;

B. depositing a first photoresist layer over the antireflective hardmask layer for defining a first pattern in the antireflective hardmask layer, the first pattern determining a location and size of openings in the first insulating layer;

C. exposing the first photoresist layer with light for defining the first pattern in the first photoresist layer, wherein the antireflective hardmask layer is antireflective to said light used for exposing the first photoresist layer, and wherein said antireflective hardmask layer abuts said first photoresist layer on the opposite side of the first photoresist layer that is exposed to said light;

D. etching the first pattern in the first photoresist layer;

E. etching the first pattern of openings in the antireflective hardmask layer as defined by the first photoresist layer after step D;

F. removing the first photoresist layer;

G. depositing a second photoresist layer over the antireflective hardmask layer after step F, the second photoresist layer defining a second pattern that determines a location and size of openings in a second insulating layer that is below the first insulating layer;

H. exposing the second photoresist layer with light for defining the second pattern in the second photoresist layer, wherein the antireflective hardmask layer is antireflective to said light used for exposing the second photoresist layer, and wherein a substantial portion of said antireflective hardmask layer abuts said second photoresist layer on the opposite side of the second photoresist layer that is exposed to said light;

I. etching the second pattern in the second photoresist layer; and

J. etching the second pattern of openings through the first insulating layer as defined by the second photoresist layer after step I.

2. The method of claim 1, further including the steps of:

K. removing the second photoresist layer; and

L. etching the first pattern of openings through the first insulating layer and etching the second pattern of openings through the second insulating layer.

3. The method of claim 2, further including the step of:

M. partially etching the antireflective hardmask layer during step L.

4. The method of claim 2, wherein the first pattern defines trench lines within the first insulating layer, and wherein the second pattern defines via holes within the second insulating layer.

5. The method of claim 4, wherein the trench lines and via holes are contiguous openings in a dual-damascene metallization structure.

6. The method of claim 5, wherein the antireflective hardmask layer is comprised of siliconoxynitride and has a thickness in the range of 750 Angstroms to 1000 Angstroms.

7. The method of claim 1, wherein the antireflective hardmask layer is comprised of siliconoxynitride and has a thickness in the range of 750 Angstroms to 1000 Angstroms.

8. A method for etching trench lines and via holes in a dual-damascene metallization structure in an integrated circuit, the method including the steps of:

A. depositing a siliconoxynitride hardmask layer over a trench insulating layer, wherein the siliconoxynitride hardmask layer has a thickness in the range of 750 Angstroms to 1000 Angstroms;

B. depositing a first photoresist layer over the siliconoxynitride hardmask layer for defining a trench line pattern in the siliconoxynitride hardmask layer, the trench line pattern determining a location and size of trench lines in the first insulating layer;

C. exposing the first photoresist layer with light for defining the first pattern in the first photoresist layer, wherein the siliconoxynitride hardmask layer is antireflective to said light used for exposing the first photoresist layer, and wherein said siliconoxynitride hardmask layer abuts said first photoresist layer on the opposite side of the first photoresist layer that is exposed to said light;

D. etching the first pattern in the first photoresist layer;

E. etching the first pattern of trench lines in the siliconoxynitride hardmask layer as defined by the first photoresist layer after step D;

F. removing the first photoresist layer;

G. depositing a second photoresist layer over the siliconoxynitride hardmask layer after step F, the second photoresist layer defining a second pattern that determines a location and size of via holes in a via insulating layer that is below the trench insulating layer;

H. exposing the second photoresist layer with light for defining the second pattern in the second photoresist layer, wherein the siliconoxynitride hardmask layer is antireflective to said light used for exposing the second photoresist layer, and wherein a substantial portion of said siliconoxynitride hardmask layer abuts said second photoresist layer on the opposite side of the second photoresist layer that is exposed to said light;

I. etching the second pattern in the second photoresist layer;

J. etching the second pattern of openings through the first insulating layer as defined by the second photoresist layer after step I, the first pattern defining openings for trench lines that are contiguous with opening for via holes defined by the second pattern;

K. removing the second photoresist layer;

L. etching the first pattern of trench lines through the first insulating layer and etching the second pattern of via holes through the second insulating layer; and

M. partially etching the siliconoxynitride hardmask layer during step L.