Electronic vernier systems and methods

• US 6,060,933 A
• Filed: 07/08/1998
• Issued: 05/09/2000
• Est. Priority Date: 07/08/1998
• Status: Expired due to Term

• Current Assignee: Analog Devices, Inc.
• Original Assignee: Analog Devices, Inc.
• Inventors: Jordan, Edward P., Gosser, Royal A.
• Primary Examiner(s): LE, DINH THANH
• Application Number:
  US09/112,038
• Time in Patent Office: 671 Days
• Field of Search: 327/308, 327/306, 327/560, 327/350, 327/179, 327/403, 327/405, 327/478, 330/278, 330/279, 330/288, 330/294, 330/86, 330/154, 333/81 R, 333/81 A, 333/81 B
• US Class Current: 327/308
• CPC Class Codes: H03G 1/0088 using discontinuously variable devices, e.g. switch-operated

Abstract

An electronic vernier realizes programmable gain steps with first and second impedance ladders, a plurality of activatable coupling networks and a switch network. The ladders receive and progressively process the differential input signal into a plurality of progressive differential signals. In an embodiment, the coupling networks each generate a respective one of a plurality of progressive differential output signals in response to a respective one of the progressive differential signals and the switch network activates any selected one of the coupling networks. Thus, any selected vernier step is obtained by activating the respective coupling network. The verniers can be integrated into various systems, e.g., programmable amplifiers.

Claims

1. An electronic vernier for processing a differential input signal into a plurality of progressive differential output signals, comprising:

first and second impedance ladders that differentially receive and progressively process said differential input signal into a plurality of progressive differential signals;

an output circuit having differential output terminals;

a plurality of activatable differential coupling networks that each differentially receives a respective one of said progressive differential signals and differentially couples it across said output circuit to form a respective one of said progressive differential output signals at said differential output terminals;

and

wherein each of said plurality of activatable differential coupling networks comprises a switch network that activates said each of said coupling networks.

2. The vernier of claim 1, wherein said first and second impedance ladders each include a serially-connected string of resistors and all of said resistors have a resistance less than 100 ohms to enhance the processing speed of said ladders.

3. The vernier of claim 1, wherein said first and second impedance ladders each include a serially-connected string of resistors and each adjacent pair of said resistors has a substantially constant ratio.

4. The vernier of claim 1, wherein each of said coupling networks has a coupling gain represented by a ratio of a respective one of said progressive differential output signals to a respective one of said progressive differential signals, and wherein each of said coupling networks has substantially the same coupling gain.

5. The vernier of claim 1, wherein each of said coupling networks generates a differential current signal in response to a respective one of said progressive differential signals and said output circuit comprises first and second resistors that differentially receive said differential current signal to generate said progressive differential output signals.

6. The vernier of claim 1, wherein each of said coupling networks includes a differential pair of transistors that is activated by an activation current and wherein said switch network includes a plurality of switches that each supply a respective one of said coupling networks with said activation current.

7. The vernier of claim 6, wherein said output circuit includes a first resistor that is driven by one transistor of said differential pair and a second resistor that is driven by the other transistor of said differential pair to generate said progressive differential output signals.

8. The vernier of claim 7, wherein said output circuit further includes first and second emitter followers that are respectively coupled to said first and second resistors.

9. The vernier of claim 1, wherein said ladders include resistors that are related by a logarithmic progression.

10. A programmable gain system, comprising:

at least one programmable gain device having device gain steps; and

an electronic vernier which is coupled in series with said programmable gain device to receive a differential input signal, said vernier including;

a) first and second impedance ladders that differentially receive and progressively process said differential input signal into a plurality of progressive differential signals;

b) an output circuit having differential output terminals;

c) a plurality of activatable differential coupling networks that each differentially receives a respective one of said progressive differential signals and differentially couples it across said output circuit to form a respective one of a plurality of progressive differential output signals at said differential output terminals; and

wherein each of said plurality of activatable differential coupling networks comprises

d) a switch network that activates said each of said coupling networks;

said progressive differential output signals forming vernier gain steps that are sized to span any one of said device gain steps.

11. The programmable gain system of claim 10, wherein said first and second impedance ladders each include a serially-connected string of resistors and all of said resistors have a resistance less than 100 ohms to enhance the processing speed of said ladders.

12. The programmable gain system of claim 10, wherein said first and second impedance ladders each include a serially-connected string of resistors and an impedance ratio of each adjacent pair of said resistors is substantially constant.

13. The programmable gain system of claim 10, wherein each of said coupling networks has a coupling gain represented by a ratio of a respective one of said progressive differential output signals to a respective one of said progressive differential signals, and wherein each of said coupling networks has substantially the same coupling gain.

14. The programmable gain system of claim 10, wherein each of said coupling networks generates a differential current signal in response to a respective one of said progressive differential signals and said output circuit includes first and second resistors that differentially receive said differential current signal to generate said progressive differential output signals.

15. The programmable gain system of claim 10, wherein each of said coupling networks includes a differential pair of transistors that is activated by an activation current and wherein said switch network includes a plurality of switches that are each associated with a respective one of said coupling networks and arranged to supply said activation current.

16. The programmable gain system of claim 15, wherein said output circuit includes a first resistor that is driven by one transistor of said differential pair and a second resistor that is driven by the other transistor of said differential pair to generate said progressive differential output signals.

17. A method for processing a differential input signal into a plurality of progressive differential output signals, comprising the steps of:

receiving said differential input signal with first and second impedance ladders to form a plurality of progressive differential signals;

activating any one of a plurality of coupling networks to select a respective one of said progressive differential signals; and

in response to said activating step, differentially coupling said one of said progressive differential signals through first and second resistors of an output circuit to form a respective one of said progressive differential output signals at differential output terminals.

18. The method of claim 17, wherein signals along said ladders represent said progressive differential signals.

19. The method of claim 17, further including the step of forming said first and second impedance ladders so that each of said progressive differential output signals has a substantially constant ratio with a respective one of said progressive differential signals.

20. The method of claim 17, wherein amplitudes of said progressive differential signals and said progressive differential output signals are related by a logarithmic progression.