Technique for hot plugging a peripheral controller card containing PCI and SCSI buses on a single connector into a host system board

• US 6,061,752 A
• Filed: 06/15/1998
• Issued: 05/09/2000
• Est. Priority Date: 06/16/1997
• Status: Expired due to Term

• Current Assignee: Hewlett Packard Enterprise Development LP (Hewlett-Packard Enterprise Company)
• Original Assignee: Compaq Computer Corporation (HP Inc.)
• Inventors: Grieff, Thomas W., Sabotta, Michael L., Jones, Bryan A.
• Primary Examiner(s): Sheikh, Ayaz R.
• Assistant Examiner(s): Lefkowitz, Sumati
• Application Number:
  US09/097,493
• Time in Patent Office: 694 Days
• Field of Search: 710/100-103, 710/126-130, 710/2
• US Class Current: 710/302
• CPC Class Codes: G06F 13/409 Mechanical coupling back panels H05K7/1438

Abstract

An embodiment of the present invention discloses a technique that allows hot plugging a peripheral controller card, containing both a local bus and a peripheral bus on a single connector, into a host system board containing a host system bus and a host I/O bus. When mating the peripheral controller card to the host system board a local device power supply (LDPS) is inactive, a peripheral device power bus (PDPB) is powered, and signal lines of a peripheral device are maintained in a high impedance state. Following a delay after the mating, the LDPS is activated by the host operating system (OS). Following the activation of the LDPS, the host system bus is coupled to the single connector through switches that are under OS control. In response to the activation of the LDPS, the signal lines of the peripheral device are enabled.

In a disclosed embodiment the peripheral controller card is a disk array controller card, the local bus is a PCI bus, and the peripheral bus is a SCSI bus. In one embodiment the disk array controller card is coupled to a mass storage peripheral and in another embodiment is programmed for RAID. An advantage of an embodiment of the present invention is that a PCI bus and a SCSI bus are carried on a single peripheral connector which provides cable management and readily allows hot plugging a redundant peripheral controller card into the host system board.

Claims

1. A method of hot plugging a peripheral controller card into a host system board using a single connector, the single connector coupling a local bus and a peripheral bus of the peripheral controller card to a host system bus and a host I/O bus of the host system board, the single connector also providing a local device power supply and a peripheral device power supply to the peripheral controller card, the local device power supply providing power to local devices coupled to the local bus, the peripheral device power supply providing power to a peripheral device coupled to both the local bus and the peripheral bus, the method comprising the steps of:

mating the local bus with the host system bus and the peripheral bus with the host I/O bus, wherein the local device power supply is inactive, the peripheral device power supply is active, and signal lines of the peripheral device are maintained in a high impedance state;

activating the local device power supply; and

enabling the signal lines of the peripheral device in response to the activation of the local device power supply.

2. The method of claim 1, wherein the mating step further comprises:

pre-mating power and ground pins of the local device power supply and the peripheral device power supply; and

mating the local bus with the host system bus and the peripheral bus with the host I/O bus after the pre-mating step.

3. The method of claim 1, wherein the local device power supply is activated by a host operating system after a predetermined time interval.

4. The method of claim 1, wherein the host system bus is coupled to the single connector through switches located on the host system board, the switches being controlled by a host operating system.

5. The method of claim 1, wherein the signal lines of the peripheral device are maintained in the high impedance state by coupling a reset line of the peripheral device to the peripheral device power supply responsive to the local device power supply.

6. The method of claim 1, wherein the signal lines of the peripheral device are enabled and the reset line of the peripheral device is coupled to the single connector in response to the activation of the local device power supply.

7. The method of claim 1, wherein the peripheral controller is programmed for RAID.

8. The method of claim 1, wherein the peripheral controller is coupled to a mass storage peripheral.

9. The method of claim 1, wherein the local bus and the host system bus are PCI buses.

10. The method of claim 1, wherein the peripheral bus and the host I/O bus are SCSI buses.

11. A computer system capable of hot plugging a peripheral controller card, the computer system comprising:

a peripheral controller card, comprising;

a local bus for communication with the host system board;

a local device coupled to the local bus;

a peripheral bus for communication with I/O devices;

a peripheral device coupled to both the local bus and the peripheral bus; and

a single connector;

a host system board including a peripheral connector to mate with the single connector of the peripheral controller card, the peripheral connector when mated with the single connector coupling the local bus and the peripheral bus of the peripheral controller card to a host system bus and a host I/O bus of the host system board, the peripheral connector when mated with the single connector also providing a local device power supply and a peripheral device power supply to the peripheral controller card, the local device power supply providing power to local devices coupled to the local bus of the peripheral controller card, the peripheral device power supply initially providing power to a peripheral device coupled to both the local bus and the peripheral bus of the peripheral controller card; and

a processor coupled to the host system bus and the host I/O bus for communicating with the peripheral controller card,

wherein upon mating of the peripheral controller card to the host system board the local device power supply is inactive, the peripheral device power supply is active, and the plurality of signal lines of the peripheral device of the peripheral controller card are maintained in a high impedance state.

12. The computer system of claim 11, wherein power and ground pins of the local device power supply and the peripheral device power supply are mated before pins of the local bus and the peripheral bus are mated with pins of the host system bus and the host I/O bus.

13. The computer system of claim 11, wherein the local device power supply is activated by a host operating system after a predetermined time interval.

14. The computer system of claim 11, wherein the host system bus is coupled to the peripheral connector through switches located on the host system board, and wherein the switches are controlled by a host operating system.

15. The computer system of claim 11, wherein the signal lines of the peripheral device are maintained in the high impedance state by coupling a reset line of the peripheral device to the peripheral device power supply responsive to the local device power supply.

16. The computer system of claim 11, wherein the signal lines of the peripheral device are enabled and a reset line of the peripheral device is coupled to the single connector in response to the activation of the local device power supply.

17. The computer system of claim 11, wherein the peripheral controller card is programmed for RAID.

18. The computer system of claim 11, wherein the peripheral controller card is coupled to a mass storage peripheral.

19. The computer system of claim 11, wherein the local bus and the host system bus are PCI buses.

20. The computer system of claim 11, wherein the peripheral bus and the host I/O bus are SCSI buses.

21. A peripheral controller card capable of being hot plugged into a host system board, the peripheral controller card comprising:

a local bus for communication with the host system board;

a local device coupled to the local bus;

a peripheral bus for communication with I/O devices;

a peripheral device coupled to both the local bus and the peripheral bus; and

a single connector for mating with a peripheral connector of the host system board, the single connector coupling the local bus and the peripheral bus of the peripheral controller card to a host system bus and a host I/O bus of the host system board, the single connector when mated with the peripheral connector also providing power to a local device power supply and a peripheral device power supply to the peripheral controller card, the local device power supply providing power to the local device coupled to the local bus of the peripheral controller card, the peripheral device power supply initially providing power to a peripheral device coupled to both the local bus and the peripheral bus of the peripheral controller card,

wherein upon mating of the peripheral controller card to the host system board the local device power supply is inactive, the peripheral device power supply is active, and signal lines of the peripheral device of the peripheral controller card are maintained in a high impedance state.

22. The peripheral controller card of claim 21, wherein power and ground pins of the local device power supply and the peripheral device power supply are mated before pins of the local bus and the peripheral bus are mated with pins of the host system bus and the host I/O bus.

23. The peripheral controller card of claim 21, wherein the signal lines of the peripheral device are maintained in the high impedance state by coupling a reset line of the peripheral device to the peripheral device power supply responsive to the local device power supply.

24. The peripheral controller card of claim 21, wherein the signal lines of the peripheral device are enabled and a reset line of the peripheral device is coupled to the single connector in response to the activation of the local device power supply.

25. The peripheral controller card of claim 21, wherein the peripheral controller card is programmed for RAID.

26. The peripheral controller card of claim 21, wherein the peripheral controller card is coupled to a mass storage peripheral.

27. The peripheral controller card of claim 21, wherein the local bus and the host system bus are PCI buses.

28. The peripheral controller card of claim 21, wherein the peripheral bus and the host I/O bus are SCSI buses.