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Hardware-optimized reed-solomon decoder for large data blocks

  • US 6,061,826 A
  • Filed: 07/29/1997
  • Issued: 05/09/2000
  • Est. Priority Date: 07/29/1997
  • Status: Expired due to Fees
First Claim
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1. An error computation processor for use in a Reed Solomon decoder for computing the error locations and magnitudes of a large data block having a maximum of t errors over a desired Galois field, the processor comprising:

  • first computing means for computing an error-locator polynomial and an error-evaluator polynomial; and

    second computing means for computing the values of the errors whose location was determined to be in error;

    wherein said first and second computing means requires only a first polynomial storage register, a second polynomial storage register, a first element storage register, a second element storage register, one multiplier for performing selected multiplication and division, one adder for performing selected addition and subtraction, an error location stack, an error value stack, and a syndrome register for storing the syndromes of the large data block.

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