Apparatus for inserting data into the vertical blanking interval of a video signal

• US 6,064,440 A
• Filed: 01/08/1998
• Issued: 05/16/2000
• Est. Priority Date: 01/08/1998
• Status: Expired due to Fees

• Current Assignee: Navis Digital Media Systems Co.
• Original Assignee: Navis Digital Media Systems Co.
• Inventors: Thompson, Kenneth R., Cousineau, Paul A., Born, Gregory S.
• Primary Examiner(s): Peng, John K.
• Assistant Examiner(s): DESIR, JEAN WICEL
• Application Number:
  US09/004,475
• Time in Patent Office: 859 Days
• Field of Search: 348/478, 348/479, 348/476, 348/477, 348/473, 348/461, 348/563, 348/567, 348/705, 348/13, 455/4.2, 455/5.1, 455/6.1, 358/147, 358/142
• US Class Current: 348/478
• CPC Class Codes: H04N 7/088 the inserted signal being digital

Abstract

An improved data inserter for inserting data into selected lines, including the vertical blanking interval, of a television or video signal. The data inserter includes a parallel interface for receiving data and a digital signal processor (DSP) for controlling the insertion of that data. A dual port memory structure is used to temporarily store data to be inserted. The dual port memory is associated with and connected to an autobuffer unit. Each video signal received by the inserter is provided to a switch which is also coupled to the autobuffer unit so that the switch may receive data stored in the dual port memory devices. When a selected line in a given video signal is detected by the DSP, it triggers the respective autobuffer unit which, in turn, transfers the data out of the dual port memory to the respective switch for insertion into the selected line of the video signal.

Claims

1. An apparatus for inserting digital data into selected lines of a video signal, the apparatus receiving a plurality of video signals each corresponding to a programming channel and having vertical and horizontal synchronization pulses disposed therein for identifying individual lines of the signal, the apparatus comprising:

a parallel interface for receiving the digital data to be inserted;

a digital signal processor coupled to receive the digital data from the parallel interface, the digital signal processor including a bus structure and being constructed and arranged to monitor at least the vertical synchronization pulses of each received video signal;

a dual port memory structure having a first port and a second port, the dual port memory structure being connected through the first port to the bus structure for receiving and temporarily storing digital data from the digital signal processor;

at least one autobuffer unit associated with the dual port memory structure, the at least one autobuffer unit connected to the second port of the dual port memory structure for receiving digital data stored therein and to the bus structure so as to permit the digital signal processor to load instructions into the autobuffer unit; and

a switch associated with each received video signal, each switch connected to receive its corresponding video signal and further coupled to an autobuffer unit so as to receive digital data temporarily stored in the dual port memory structure,

wherein the digital signal processor is constructed and arranged to receive digital data to be inserted into a given video signal via the parallel interface, transfer that data via the bus structure to a predetermined location in the dual port memory structure and load the at least one autobuffer unit with a pointer identifying the location of the data within the dual port memory structure and the switch coupled to the given video signal, and

wherein the autobuffer unit is constructed and arranged to identify the selected lines for data insertion in the given video signal by monitoring at least the horizontal synchronization pulses and, in response, to retrieve the temporarily stored data at the predetermined location in the dual port memory structure from the second port and transfer the data to the identified switch whereby the switch inserts the received data into the selected lines of the selected video signal.

2. The apparatus of claim 1 further comprising a timing circuit associated with each video signal, each timing circuit coupled to the at least one autobuffer unit and configured and arranged to receive and detect horizontal synchronization pulses from the associated video signal and to provide a data insertion message to the at least one autobuffer unit at a preselected time following the detection of a horizontal synchronization pulse.

3. The apparatus of claim 2 further comprising a transport/interrupt processor coupled to the digital signal processor, the transport/interrupt processor configured and arranged to receive and detect vertical synchronization pulses from the video signals and to provide an interrupt flag to the digital signal processor in response to the detection of a vertical synchronization pulse.

4. The apparatus of claim 3 wherein the digital signal processor loads the at least one autobuffer unit with the pointer in response to receiving an interrupt flag that corresponds to the given video signal.

5. The apparatus of claim 4 wherein the digital signal processor, in response to receiving an interrupt flag, polls the transport/interrupt processor to determine which video signal reached its vertical synchronization pulse.

6. The apparatus of claim 5 wherein the digital signal processor divides the received digital data into one or more data blocks, each data block containing digital data for insertion into a preselected horizontal line of a video signal and including information identifying the respective horizontal line.

7. The apparatus of claim 6 wherein the digital signal processor organizes a set of data blocks, including a first data block, containing digital data for insertion into a frame of the given video signal, transfers the set of data blocks to the predetermined location in the dual port memory structure, and, in response to receiving the interrupt flag from the transport/interrupt processor for the given video signal, loads the at least one autobuffer unit with the pointer.

8. The apparatus of claim 7 wherein the at least one autobuffer unit, in response to receiving the pointer from the digital signal processor, determines the horizontal line number associated with the first data block from the set of data blocks.

9. The apparatus of claim 8 wherein the at least one autobuffer unit includes a horizontal synchronization pulse counter and, in response to receiving the pointer from the digital signal processor, initially zeroes and begins incrementing the horizontal synchronization pulse counter in response to each data insertion message from the timing circuit associated with the given video signal.

10. The apparatus of claim 9 wherein the at least one autobuffer unit retrieves the digital data from the first data block and transfers it to the identified switch, in response to detecting a match between the horizontal synchronization counter and the preselected horizontal line associated with the first data block.

11. The apparatus of claim 10 further comprising a read only memory coupled to the digital signal processor, the read only memory containing an instruction set for governing the operations of the digital signal processor.

12. The apparatus of claim 11 further comprising a first-in-first-out memory (FIFO) coupled to the parallel interface and the digital signal processor, the FIFO configured and arranged to receive and temporarily store digital data from the parallel interface and provide the stored data to the digital signal processor.

13. An apparatus for inserting digital data into selected lines of a video signal, the apparatus receiving a plurality of video signals each corresponding to a programming channel and having vertical and horizontal synchronization pulses disposed therein for identifying individual fields and lines of the signal, the apparatus comprising:

a parallel interface for receiving the digital data to be inserted;

a digital signal processor coupled to receive the digital data from the parallel interface, the digital signal processor including a bus structure and being constructed and arranged to monitor at least the vertical synchronization pulses of each received video signal;

a plurality of dual port memory devices each having a first port and a second port, the first port of each dual port memory device connected to the bus structure for receiving and temporarily storing digital data from the digital signal processor;

an autobuffer unit associated with each dual port memory device and connected to the second port of its associated dual port memory device for receiving digital data stored therein and to the bus structure so as to permit the digital signal processor to load instructions into the autobuffer unit, each autobuffer unit having a horizontal synchronization counter;

a switch associated with each received video signal, each switch connected to receive the corresponding video signal and further coupled to one of the autobuffer units so as to receive digital data temporarily stored in the dual port memory device associated with the respective autobuffer unit;

a timing circuit associated with each video signal, each timing circuit coupled to one of the autobuffer units and configured and arranged to receive and detect horizontal synchronization pulses from the associated video signal and to provide a data insertion message to the respective autobuffer unit at a preselected time following the detection of a horizontal synchronization pulse; and

a transport/interrupt processor coupled to the digital signal processor, the transport/interrupt processor configured and arranged to receive and detect vertical synchronization pulses from the video signals and to provide an interrupt flag to the digital signal processor in response to the detection of a vertical synchronization pulse,

wherein the digital signal processor is constructed and arranged to receive digital data to be inserted into a given video signal via the parallel interface, transfer that data via the bus structure to a predetermined location in the dual port memory device associated with the given video signal, and load the at least one autobuffer unit with a pointer identifying the location of the data within the dual port memory structure and the switch coupled to the given video signal, in response to receiving an interrupt flag from the transport/interrupt processor for the given video signal, and

wherein each autobuffer unit is constructed and arranged to zero its horizontal synchronization pulse counter in response to receiving the pointer from the digital signal processor, to increment its horizontal synchronization pulse counter in response to data insertion messages from the timing circuit, and, upon detecting a match between its horizontal synchronization pulse counter and the data in the predetermined to retrieve the temporarily stored data from the second port of the dual port memory device and transfer the data to the identified switch whereby the switch inserts the received data into the matching line of the selected video signal.

14. A method for inserting digital data into selected lines of a plurality of video signals, each video signal corresponding to a programming channel and having vertical and horizontal synchronization pulses disposed therein for identifying individual lines of the signal, the method comprising the steps of:

receiving data on a parallel interface to be inserted in a given video signal;

examining the received data to identify the given video signal;

transferring the received data to a dual port memory structure through a first port of the dual port memory structure for temporary storage of the data;

monitoring the vertical and horizontal synchronization pulses of the given video signal to identify a first selected line for data insertion;

upon identifying the first selected line, triggering an autobuffer unit coupled to a second port of the dual port data structure;

in response to the step of triggering, transferring data stored in the dual port memory structure through the second port to a switch also coupled to the given video signal; and

inserting the data obtained from the second port of the dual port memory structure into the first selected line of the given video signal.

15. The method of claim 14 further comprising the steps of:

prior to the step of transferring, dividing the received data into one or more data blocks, each data block containing digital data for insertion into a particular horizontal line of the given video signal and including information identifying the particular horizontal line; and

counting horizontal synchronization pulses in the given video signal and triggering the autobuffer unit in response to detecting a match between the current horizontal line of the given video signal and the particular horizontal line of a data block.

16. The method of claim 15 further comprising the step of issuing a data insertion message following expiration of a preselected amount of time after detection of a horizontal synchronization pulse, and wherein the step of inserting is in response to the data insertion message.