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Circuit and method for eliminating idle cycles in a memory device

  • US 6,064,624 A
  • Filed: 04/12/1999
  • Issued: 05/16/2000
  • Est. Priority Date: 09/16/1997
  • Status: Expired due to Term
First Claim
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1. A circuit, comprisinga first data input register having an output terminal;

  • a second data input register having an input terminal and an output terminal, the input terminal coupled to the output terminal of said first data input register;

    a multiplexer having first and second input terminals and an output terminal, the first input terminal coupled to the output terminal of said first data input register, and the second input terminal coupled to the output terminal of said second data input register; and

    a write driver having an input terminal coupled to the output terminal of said multiplexer.

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