Insulated gate type semiconductor device with potential detection gate for overvoltage protection
First Claim
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1. An insulated gate type semiconductor device comprising:
- a semiconductor substrate;
first and second current electrodes sandwiching said semiconductor substrate;
a potential detection gate in a floating state for detecting a monitor potential that depends on a potential difference between said first and second current electrodes; and
a drive gate insulated from said first and second current electrodes, for driving said first and second current electrodes to enter a conductive state when said monitor potential exceeds a specific level.
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Abstract
Internal gate electrodes (71) are all connected in common to a gate terminal, and a floating gate electrode (72) is connected to the gate electrode of an NMOS transistor (M1). An external emitter electrode (91) is provided on a first major surface of P-type diffused lease region (21), and N-type diffused emitter region (31) and P-type diffused base region (21) are short-circuited. The source of the NMOS transistor (M1) and an emitter terminal are also connected to the external emitter electrode (91). The drain of the NMOS transistor (M1) is connected to an external terminal.
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20 Claims
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1. An insulated gate type semiconductor device comprising:
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a semiconductor substrate; first and second current electrodes sandwiching said semiconductor substrate; a potential detection gate in a floating state for detecting a monitor potential that depends on a potential difference between said first and second current electrodes; and a drive gate insulated from said first and second current electrodes, for driving said first and second current electrodes to enter a conductive state when said monitor potential exceeds a specific level. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification