Partial or complete amplifier bypass

• US 6,069,526 A
• Filed: 08/04/1998
• Issued: 05/30/2000
• Est. Priority Date: 08/04/1998
• Status: Expired due to Term

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Ballantyne, Gary J.
• Primary Examiner(s): Mottola, Steven J.
• Application Number:
  US09/129,020
• Time in Patent Office: 665 Days
• Field of Search: 330/51, 330/151, 330/284, 330/302, 330/310
• US Class Current: 330/51
• CPC Class Codes: H03F 2203/7239 the gated amplifier being switched on or off by putting into parallel or not, by choosing between amplifiers and shunting lines by one or more switch(es)
• CPC Class Codes: H03F 3/193 with field-effect devices H03F3/195 takes precedence
• CPC Class Codes: H03F 3/72 Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal

Abstract

A power amplifier circuit arrangement particularly useful for portable phones used in wireless systems. A power amplifier stage can be partially or completely bypassed so that multi-stage amplifiers can be built that allow wide dynamic range of power amplification to be obtained efficiently. A switch at the input of an amplifier stage couples an input signal either to an amplifier or to a bypass path. The output of the amplifier is coupled to a first impedance-transforming network. The bypass path includes a second impedance-transforming network. A third impedance transforming network couples the outputs of the first and second impedance transforming networks. The impedance transforming networks are constructed and arranged so that input and output signals see the correct load regardless of whether the amplifier is used or bypassed. Using the principles of this invention, multi-stage amplifiers can be constructed including input and bypass attenuators to achieve a wide range of gain levels.

Claims

1. A power amplifier circuit arrangement, comprising:

an input circuit for receiving an input signal;

an amplifier;

an output circuit for producing an output signal from the amplifier circuit;

a first impedance transforming network having a first end coupled to an output of the amplifier and a second end coupled to the output circuit;

a second impedance transforming network having first and second ends;

a first switch for coupling an input signal to either the amplifier or to the first end of the second impedance-transforming network;

a third impedance transforming network having a first end coupled to the second end of the first impedance transforming network and a second end;

a second switch for coupling the second end of the third impedance transforming network to either the second end of the second impedance transforming network or to ground, operation of the second switch being coordinated with operation of the first switch such that the amplifier is bypassed when the first switch couples the input signal to the second impedance transforming network and the second switch couples the second end of the second impedance transforming network to the third impedance transforming network, the first and second switches and the second impedance transforming network constituting a bypass circuit.

2. A power amplifier circuit arrangement according to claim 1 further comprising an attenuator in the bypass circuit.

3. A power amplifier according to claim 1 wherein the first switch is constituted by at least one diode.

4. A power amplifier according to claim 1 wherein the second switch is constituted by at least one diode.

5. A power amplifier according to claim 1 wherein the third impedance transforming network is constituted by a capacitor.

6. A power amplifier according to claim 1 wherein the second impedance transforming network is constituted by an inductor.

7. A power amplifier circuit arrangement, comprising:

an input circuit for receiving an input signal;

an amplifier;

an output circuit for producing an output signal from the amplifier circuit;

a first amplifier;

a first attenuator coupling the input circuit to an input of the first amplifier;

a first switch for coupling an output of the first amplifier to either a first or second node;

a second attenuator coupled to the second node;

a second amplifier having an input coupled to the first node;

a first impedance transforming network having a first end coupled to an output of the second amplifier and a second end coupled to the output circuit;

a second impedance transforming network having a first end coupled to a second end of the first impedance transforming network and a second end; and

a second switch for coupling the second end of the second impedance transforming network to either the output of the second attenuator or to ground.

8. A power amplifier circuit arrangement according to claim 7 wherein the second amplifier comprises first and second amplifier devices.

9. A power amplifier circuit arrangement according to claim 7 wherein the first switch is constituted by at least one diode.

10. A power amplifier circuit arrangement according to claim 7 wherein the second switch is constituted by at least one diode.

11. A power amplifier circuit arrangement according to claim 7 wherein the first attenuator has a plurality of selectable degrees of attenuation.

12. A power amplifier circuit arrangement according to claim 7 wherein the second attenuator has a plurality of selectable degrees of attenuation.

13. A power amplifier circuit arrangement according to claim 10 wherein the first attenuator has a plurality of selectable degrees of attenuation.

14. A power amplifier circuit arrangement according to claim 7 wherein the second amplifier is comprised of a plurality of amplifier devices.