Integrated circuit defect review and classification process

• US 6,072,574 A
• Filed: 01/30/1997
• Issued: 06/06/2000
• Est. Priority Date: 01/30/1997
• Status: Expired due to Fees

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Zeimantz, Lisa R.
• Primary Examiner(s): Pham, Hoa Q.
• Application Number:
  US08/790,999
• Time in Patent Office: 1,223 Days
• Field of Search: 356/237, 356/239, 356/394, 356/429-431, 356/237.1, 356/237.2, 356/237.3, 356/237.4, 356/237.5, 356/239.3, 356/239.7, 356/239.8, 250/307, 250/310
• US Class Current: 356/237.4
• CPC Class Codes: G01N 21/9501 Semiconductor wafers manufacturing processes per se of semiconductor devices implementing a measuring step H01L22/10
• CPC Class Codes: H01L 2223/5444 for electrical read out

Abstract

The present invention relates to circuit defect detection, classification, and review in the wafer stage of the integrated circuit semiconductor device manufacturing process. The method of processing integrated circuit semiconductor dice on a wafer in a manufacturing process for dice comprising the steps of visually inspecting said dice on said wafer to determine defects thereon, summarizing the number, types, and ranges of sizes of the defects of said dice on said wafer, and determining if said wafer is acceptable to proceed in said manufacturing process.

Claims

1. A method of processing integrated circuit semiconductor dice on a wafer in a manufacturing process for said integrated circuit semiconductor dice by a user, each integrated circuit die of said integrated circuit semiconductor dice having at least one circuit, said method comprising the steps of:

determining from historical information concerning a process of manufacture of integrated circuit semiconductor dice on wafers at least one relationship between at least one type of surface defect on at least one die of the integrated circuit semiconductor dice on the wafers visible to a user visually inspecting the integrated circuit semiconductor dice on the wafers for at least one surface defect thereon and at least one subsequent failure of the at least one die having a surface defect thereon of the integrated circuit semiconductor dice on the wafers;

visually inspecting at least one die of integrated circuit semiconductor dice on a wafer to determine surface defects thereon by a user viewing at least one die of said integrated circuit dice on said wafer, said surface defects including at least one defect of defects from bond pad formation problems and defects from incomplete formation of said at least one circuit of said at least one die of said integrated circuit dice on said wafer;

selecting the types of surface defects present on said least one die of said integrated circuit dice on said wafer from the visual inspection of at least one die of said integrated circuit dice on said wafer by a user

selecting the ranges of sizes of said surface defects from the visual inspection of said at least one die of said integrated circuit dice on said wafer by a user;

selecting the number of said integrated circuit dice for visual inspection on said wafer by a user selecting at least one other die of said integrated circuit dice on said wafer for the visual inspection thereof for surface defects thereon;

summarizing the number, types, and ranges of sizes of the surface defects of said at least one integrated circuit die and said at least one other die of said integrated circuit dice on said wafer from the visual inspection of at least two dice of said integrated circuit dice on said wafer by a user;

comparing said number, types and ranges of sizes of the surface defects of said at least one integrated circuit die and said at least one other die of said integrated circuit dice on said wafer to historical information concerning the process of manufacture of integrated circuit semiconductor dice on wafers; and

determining if said wafer is acceptable to proceed in said manufacturing process based upon the visual inspection of at least two dice of said integrated circuit dice on said wafer by a user and based upon the historical information concerning the process of manufacture of integrated circuit semiconductor dice on wafers of the at least one relationship between at least one type of surface defect on at least one die of the integrated circuit semiconductor dice on the wafers visible to a user visually inspecting the integrated circuit semiconductor dice on the wafers and at least one subsequent failure of the at least one die having a surface defect thereon of the integrated circuit semiconductor dice on the wafers.

2. The method of claim 1, wherein the step of visually inspecting of said dice on said wafer includes the use of one of a scanning electron microscope and optical microscope.

3. The method of claim 1, further including the step of:

classifying said visual defects of said dice of said wafer as to size of the defect.

4. The method of claim 3 further including the step of:

classifying said visual defects of said dice of said wafer as to a size range of the defect.

5. The method of claim 4, further including the step of:

summarizing the number, types, and ranges of sizes of the defects of said dice on said wafer in a tabular manner.

6. The method of claim 5, further including the step of:

summarizing the number, types, and ranges of sizes of the defects of said dice on said wafer in a display of said dice of said wafer.

7. The method of claim 1, further including the step of:

determining if said wafer is acceptable to proceed in said manufacturing process as a wafer being processed with other wafers having dice thereon as a group of wafers in said manufacturing process.

8. The method of claim 1, further including the step of:

determining if an individual die of said dice of said wafer is acceptable to proceed in said manufacturing process.

9. A method of processing integrated circuit semiconductor dice on a wafer in a manufacturing process for said integrated circuit semiconductor dice by a user, each integrated circuit die of said integrated circuit semiconductor dice having at least one circuit, said method comprising the steps of:

determining from historical information concerning a process of manufacture of integrated circuit semiconductor dice on wafers at least one relationship between at least one type of surface defect on at least one die of the integrated circuit semiconductor dice on the wafers visible to a user visually inspecting the integrated circuit semiconductor dice on the wafers for at least one surface defect thereon and at least one subsequent failure of the at least one die having a surface defect thereon of the integrated circuit semiconductor dice on the wafers;

visually inspecting said integrated circuit semiconductor dice on said wafer to determine surface defects thereon by a user visually inspecting of at least one integrated circuit semiconductor die of said integrated circuit semiconductor dice on said wafer, said surface defects including at least one defect of defects from bond pad formation problems and defects from incomplete formation of said at least one circuit of at least one integrated circuit semiconductor die of said integrated circuit semiconductor dice on said wafer;

classifying visual surface defects on said integrated circuit semiconductor dice of said wafer as to type and range of size of surface defect by a user from the visual inspection of at least one integrated circuit semiconductor die of said integrated circuit semiconductor dice on said wafer by a user;

determining the number of surface defects on said integrated circuit semiconductor dice;

selecting the ranges of sizes of said surface defects from the visual inspection of said at least one die of said integrated circuit dice on said wafer by a user;

selecting the number of said integrated circuit dice for visual inspection on said wafer by a user selecting at least one other die of said integrated circuit dice on said wafer for the visual inspection thereof for surface defects thereon;

summarizing the number, types, and ranges of sizes of the surface defects thereon by a user from the visual inspection of at least one integrated circuit semiconductor die of said integrated circuit semiconductor dice on said wafer by a user;

comparing said number, types and ranges of sizes of the surface defects of said at least one integrated circuit die and said at least one other die of said integrated circuit dice on said wafer to historical information concerning the process of manufacture of integrated circuit semiconductor dice on wafers;

determining if said wafer is acceptable to proceed in said manufacturing process from the visual inspection of at least one integrated circuit semiconductor die of said integrated circuit semiconductor dice on said wafer by a user and based upon the historical information concerning the process of manufacture of integrated circuit semiconductor dice on wafers of the at least one relationship between at least one type of surface defect on at least one die of the integrated circuit semiconductor dice on the wafers visible to a user visually inspecting the integrated circuit semiconductor dice on the wafers and at least one subsequent failure of the at least one die having a surface defect thereon of the integrated circuit semiconductor dice on the wafers; and

photographing the surface defects on said integrated circuit semiconductor dice of said wafer from the visual inspection of at least one integrated circuit semiconductor die of said integrated circuit semiconductor dice on said wafer by a user.

10. A method of processing integrated circuit semiconductor dice on a wafer in a manufacturing process for said integrated circuit semiconductor dice by a user, each integrated circuit die of said integrated circuit semiconductor dice having at least one circuit, said method comprising the steps of:

determining from historical information concerning a process of manufacture of integrated circuit semiconductor dice on wafers at least one relationship between at least one type of surface defect on at least one die of the integrated circuit semiconductor dice on the wafers visible to a user visually inspecting the integrated circuit semiconductor dice on the wafers for at least one surface defect thereon and at least one subsequent failure of the at least one die having a surface defect thereon of the integrated circuit semiconductor dice on the wafers;

selecting the types of surface defects to be determined from the visual inspection of said integrated circuit semiconductor dice on said wafer by a user visually inspecting at least one integrated circuit semiconductor die of said integrated circuit semiconductor dice on said wafer, said surface defects including at least one defect of defects from bond pad formation problems and defects from incomplete formation of said at least one circuit of said integrated circuit semiconductor dice;

selecting the ranges of sizes of said surface defects to be determined from the visual inspection of said integrated circuit semiconductor dice on said wafer by a user from the visual inspection of at least one integrated circuit semiconductor die of said integrated circuit semiconductor dice on said wafer;

selecting a number of said integrated circuit semiconductor dice for visual inspection on said wafer by a user from the visual inspection of at least one integrated circuit semiconductor die of said integrated circuit semiconductor dice on said wafer;

visually inspecting at least one other integrated circuit semiconductor die of said integrated circuit semiconductor dice on said wafer to determine surface defects thereon by a user;

summarizing the number, types, and ranges of sizes of the surface defects of said integrated circuit semiconductor dice on said wafer by a user from the visual inspection of at least two integrated circuit semiconductor die of said integrated circuit semiconductor die on said wafer;

comparing said number, types and ranges of sizes of the surface defects of said at least one integrated circuit die and said at least one other die of said integrated circuit dice on said wafer to the historical information concerning process of manufacture of integrated circuit semiconductor dice on wafers; and

determining if said wafer is acceptable to proceed in said manufacturing process from the visual inspection of at least two integrated circuit semiconductor dice of said integrated circuit semiconductor dice on said wafer and based upon the historical information concerning the process of manufacture of integrated circuit semiconductor dice on wafers of the at least one relationship between at least one type of surface defect on at least one die of the integrated circuit semiconductor dice on the wafers visible to a user visually inspecting the integrated circuit semiconductor dice on the wafers and at least one subsequent failure of the at least one die having a surface defect thereon of the integrated circuit semiconductor dice on the wafers.

11. The method of claim 10, further including the step of:

classifying visual defects of said dice of said wafer as to type of defect.

12. The method of claim 11, further including the step of:

classifying said visual defects of said dice of said wafer as to size of the defect.

13. The method of claim 12, further including the step of:

classifying said visual defects of said dice of said wafer as to a size range of the defect.

14. The method of claim 13, further including the step of:

summarizing the number, types, and ranges of sizes of the defects of said dice on said wafer in a tabular manner.

15. The method of claim 14, further including the step of:

summarizing the number, types, and ranges of sizes of the defects of said dice on said wafer in a display of said dice of said wafer.

16. The method of claim 10, further including the step of:

determining if said wafer is acceptable to proceed in said manufacturing process as a wafer being processed with other wafers having dice thereon as a group of wafers in said manufacturing process.

17. The method of claim 10, further including the step of:

determining if an individual die of said dice of said wafer is acceptable to proceed in said manufacturing process.

18. A method of processing integrated circuit semiconductor dice on a wafer in a manufacturing process for said dice by a user, each integrated circuit die of said integrated circuit semiconductor dice having at least one circuit, said method comprising the steps of:

determining from historical information concerning a process of manufacture of integrated circuit semiconductor dice on wafers at least one relationship between at least one type of surface defect on at least one die of the integrated circuit semiconductor dice on the wafers visible to a user visually inspecting the integrated circuit semiconductor dice on the wafers for at least one surface defect thereon and at least one subsequent failure of the at least one die having a surface defect thereon of the integrated circuit semiconductor dice on the wafers;

selecting the types of surface defects to be determined from a visual inspection of said dice on said wafer by a user visually inspecting at least one die of said dice on said wafer, said surface defects including at least one defect of defects from bond pad formation problems and defects from incomplete formation of said at least one circuit of said die of said dice on said wafer;

selecting the ranges of sizes of said surface defects to be determined from the visual inspection of said dice on said wafer by a user from the visual inspection of at least one die of said dice on said wafer;

selecting a number of said dice for visual inspection on said wafer by a user from the visual inspection of at least one die of said dice on said wafer;

visually inspecting said dice on said wafer to determine surface defects thereon by a user visually inspecting at least one die of said dice on said wafer, wherein the step of visual inspection of at least one die of said dice on said wafer includes the use of one of a scanning electron microscope and optical microscope;

summarizing the number, types, and ranges of sizes of the surface defects of said dice on said wafer by a user from the visual inspection of at least one die of said dice on said wafer;

comparing said number, types and ranges of sizes of the surface defects of said at least one integrated circuit die and at least one other die of said integrated circuit dice on said wafer to the historical information concerning the process of manufacture of integrated circuit semiconductor dice on wafers; and

determining if said wafer is acceptable to proceed in said manufacturing process based upon said visual inspection by a user of at least one die of said dice on said wafer and based upon the historical information concerning the process of manufacture of integrated circuit semiconductor dice on wafers of the at least one relationship between at least one type of surface defect on at least one die of the integrated circuit semiconductor dice on the wafers visible to a user visually inspecting the integrated circuit semiconductor dice on the wafers and at least one subsequent failure of the at least one die having a surface defect thereon of the integrated circuit semiconductor dice on the wafers.

19. A method of processing integrated circuit semiconductor dice on a wafer in a manufacturing process for said dice by a user, each integrated circuit die of said integrated circuit semiconductor dice having at least one circuit, said method comprising the steps of:

determining from historical information concerning a process of manufacture of integrated circuit semiconductor dice on wafers at least one relationship between at least one type of surface defect on at least one die of the integrated circuit semiconductor dice on the wafers visible to a user visually inspecting the integrated circuit semiconductor dice on the wafers for at least one surface defect thereon and at least one subsequent failure of the at least one die having a surface defect thereon of the integrated circuit semiconductor dice on the wafers;

selecting types of surface defects to be determined from a visual inspection of said dice on said wafer by a user visually inspecting at least one die of said dice on said wafer, said surface defects including at least one defect of defects from bond pad formation problems and defects from incomplete formation of said at least one circuit of said die of said dice on said wafer;

selecting the size of said surface defects to be determined from the visual inspection of said dice on said wafer by a user visually inspecting at least one die of said dice on said wafer;

selecting the number of said dice for visual inspection on said wafer by a user based on the visual inspection of at least one die of said dice on said wafer;

visually inspecting at least one other die of said dice on said wafer to determine surface defects thereon by a user;

summarizing the number, types, and sizes of the surface defects of said dice on said wafer by a user from the visual inspection of at least two dice of said dice on said wafer;

comparing said number, types and size of the surface defects of said at least one integrated circuit die the defects and said at least one other die of said integrated circuit dice on said wafer to the historical information concerning the process of manufacture of integrated circuit semiconductor dice on wafers;

determining if said wafer is acceptable to proceed in said manufacturing process from the visual inspection of at least two dice of said dice on said wafer and based upon the historical information concerning the process of manufacture of integrated circuit semiconductor dice on wafers of the at least one relationship between at least one type of surface defect on at least one die of the integrated circuit semiconductor dice on the wafers visible to a user visually inspecting the integrated circuit semiconductor dice on the wafers and at least one subsequent failure of the at least one die having a surface defect thereon of the integrated circuit semiconductor dice on the wafers; and

photographing the surface defects on said dice of said wafer from the visual inspection by a user of at least two dice of said dice on said wafer.

20. A method of processing integrated circuit semiconductor dice on a wafer in a manufacturing process for said dice by a user, each integrated circuit die of said integrated circuit semiconductor dice having at least one circuit, said method comprising the steps of:

determining from historical information concerning a process of manufacture of integrated circuit semiconductor dice on wafers at least one relationship between at least one type of surface defect on at least one die of the integrated circuit semiconductor dice on the wafers visible to a user visually inspecting the integrated circuit semiconductor dice on the wafers for at least one surface defect thereon and at least one subsequent failure of the at least one die having a surface defect thereon of the integrated circuit semiconductor dice on the wafers;

visually inspecting at least two dice of said dice on said wafer to determine surface defects thereon by a user, said surface defects including at least one defect of defects from bond pad formation problems and defects from incomplete formation of said at least one circuit of said die of said dice on said wafer, the surface defects having a type and size;

summarizing the surface defects on said dice on said wafer by a user from the visual inspection of at least two dice of said dice on said wafer;

comparing number, types and ranges of sizes of the surface defects of said at least one integrated circuit die and at least one other die of said integrated circuit dice on said wafer to the historical information concerning the process of manufacture of integrated circuit semiconductor dice on wafers; and

determining if said wafer is acceptable to proceed in said manufacturing process from the visual inspection of at least two dice of said dice on said wafer and based upon the historical information concerning the process of manufacture of integrated circuit semiconductor dice on wafers of the at least one relationship between at least one type of surface defect on at least one die of the integrated circuit semiconductor dice on the wafers visible to a user visually inspecting the integrated circuit semiconductor dice on the wafers and at least one subsequent failure of the at least one die having a surface defect thereon of the integrated circuit semiconductor dice on the wafers.

21. The method of claim 20, further comprising the steps before the step of summarizing of:

selecting the types of surface defects to be determined from the visual inspection of said dice on said wafer by a user from the visual inspection of at least two die of said dice on said wafer;

selecting the sizes of said surface defects to be determined from the visual inspection of said dice on said wafer by a user from the visual inspection of at least two die of said dice on said wafer; and

selecting at least three of said dice for visual inspection on said wafer by a user from the visual inspection of at least two die of said dice on said wafer.

22. The method of claim 20, wherein the step of visually inspecting of said dice on said wafer includes the use of a scanning electron microscope or optical microscope by a user.