Stack package

• US 6,075,284 A
• Filed: 06/28/1999
• Issued: 06/13/2000
• Est. Priority Date: 06/30/1998
• Status: Expired due to Term

• Current Assignee: Hyundai Electronics Industries Co. Ltd. (SK Hynix Inc.)
• Original Assignee: Hyundai Electronics Industries Co. Ltd. (SK Hynix Inc.)
• Inventors: Lee, Nam Soo, Choi, Yoon Hwa
• Primary Examiner(s): Clark, Sheila V.
• Application Number:
  US09/340,543
• Time in Patent Office: 351 Days
• Field of Search: 257/666, 257/676, 257/787
• US Class Current: 257/676
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/451 with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/4826 Connecting between the body and an opposite side of the item with respect to the body
• CPC Class Codes: H01L 2225/1029 the support being a lead frame
• CPC Class Codes: H01L 2225/1041 Special adaptations for top connections of the lowermost container, e.g. redistribution layer, integral interposer
• CPC Class Codes: H01L 23/4951 Chip-on-leads or leads-on-chip techniques, i.e. inner lead fingers being used as die pad
• CPC Class Codes: H01L 23/49548 Cross section geometry H01L23/49562 takes precedence
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 25/105 the devices being of a type provided for in group H01L27/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/00015 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed as prior art

Abstract

Disclosed is a stack package. In the stack package, at least two semiconductor chips 40 are disposed up and down. Inner leads 31 of lead frames 30 are attached at a bonding pad-disposed face of the semiconductor chip 40. The inner leads 31 are electrically connected to the bonding pads of the semiconductor chips 40 with metal wires 50. Protruding portions 33,34 are formed at the inner leads 31 toward downside and upside. To expose the respective protruding portions 33,34 and outer leads 32 formed at the lowermost lead frame 30, the respective semiconductor chips 40 are molded with an epoxy compound 60. The respective lead frames 30 are electrically connected by contacting the upwardly or downwardly protruding portions 34, 33 from the respective lead frames.

Claims

1. A stack package comprising:

at least two semiconductor chips disposed up and down;

lead frames having inner leads attached at bonding pad-disposed faces of the semiconductor chips respectively, wherein a pair of protruding portions are formed at the inner leads toward upside and downside respectively, wherein among the lead frames of the semiconductor chips, only one at the lowermost position of the semiconductor chips comprises outer leads being extended from the inner leads and to be mounted on a printed circuit board;

metal wires for electrically connecting the inner leads of the respective lead frames and bonding pads of the semiconductor chips; and

an epoxy compound for separately molding the respective semiconductor chips so that the outer leads and the protruding portions are exposed therefrom,

wherein the respective lead frames are electrically connected by connecting the respective protruding portions of the lead frames being exposed from the epoxy compound.

2. The stack package of claim 1, wherein the respective protruding portions are attached by means of a conductive solder paste or a conductive epoxy.

3. A stack package comprising:

at least two semiconductor chips disposed up and down;

lead frames having only inner leads attached at bonding pad-disposed faces of the semiconductor chips respectively, wherein a pair of protruding portions are formed at the inner leads toward upside and downside respectively;

a metal wire for electrically connecting the inner leads of the respective lead frames and bonding pads of the semiconductor chips;

an epoxy compound for separately molding the respective semiconductor chips so that the protruding portions are exposed therefrom; and

solder balls mounted on the protruding portions of a lead frame which is positioned at the lowermost position among the lead frames and exposed from the epoxy compound; and

wherein the respective lead frames are electrically connected by connecting the respective protruding portions of the lead frames in which no solder balls are mounted.