Field-emission cold cathode having improved insulating characteristic and manufacturing method of the same
First Claim
1. In a field-emission cold cathode which comprises a substrate, as least one surface of the substrate being conductive, an insulating layer aggregation and a conductive gate layer formed on said conductive surface of substrate, and an emitter electrode disposed in a cavity formed in said insulating layer and said conductive gate layer, an improvement comprising:
- said insulating layer aggregation being composed of at least two piled-up insulating layers, wherein a wall surface is formed by end portions of said insulating layers and said gate layer, said wall surface forming said cavity with a section structure such that one end portion of at least one of said insulating layers other than an insulating layer closest to said gate layer is indented, andwherein an opening defined by surfaces of said wall surface formed by end portions of an insulating layer of said insulating layers closest to said gate layer has a diameter Di, and an opening defined by a surface of said wall surface formed by end portions of said gate layer has a diameter Dg, and Di and Dg have relative sizes such that -Dg/2<
Dg-Di<
Dg/3.
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Accused Products
Abstract
Piled-up films composed of different materials or composed of the same material manufactured by different methods or different conditions are used as an insulating layer for a field-emission cold cathode. The insulating layer may have a composition which is varied continuously in the thickness direction. A cross-section of the insulating layer may be made uneven. Preferably, a triple junction in which a substrate, the insulating layer, and a vacuum are in contact with one another, is disposed at a position which can not be seen from outside the device.
34 Citations
7 Claims
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1. In a field-emission cold cathode which comprises a substrate, as least one surface of the substrate being conductive, an insulating layer aggregation and a conductive gate layer formed on said conductive surface of substrate, and an emitter electrode disposed in a cavity formed in said insulating layer and said conductive gate layer, an improvement comprising:
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said insulating layer aggregation being composed of at least two piled-up insulating layers, wherein a wall surface is formed by end portions of said insulating layers and said gate layer, said wall surface forming said cavity with a section structure such that one end portion of at least one of said insulating layers other than an insulating layer closest to said gate layer is indented, and wherein an opening defined by surfaces of said wall surface formed by end portions of an insulating layer of said insulating layers closest to said gate layer has a diameter Di, and an opening defined by a surface of said wall surface formed by end portions of said gate layer has a diameter Dg, and Di and Dg have relative sizes such that -Dg/2<
Dg-Di<
Dg/3. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A field-emission cold cathode, comprising:
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a substrate, at least one surface of said substrate being conductive; an approximately cone-shaped emitter electrode formed on said conductive surface of said substrate, said emitter electrode being made of a material different from that of said conductive surface; a first insulating layer formed on said conductive surface of said substrate, said first insulating layer having a first opening larger than a bottom area of said emitter electrode to be spaced apart from said emitter electrode so as to expose said conductive surface therebetween; a second insulating layer formed on said first insulating layer and having a second opening coaxially aligned with said first opening, a size of said second opening being smaller than said first opening; and a gate electrode layer formed on said second insulating layer and having a third opening coaxially aligned with said second opening, said gate electrode layer having substantially uniform thickness around said third opening so as to have a vertical side wall in said third opening, and an expression -Dg/2<
Dg-Di<
Dg/3 being satisfied, in which Dg is the diameter of said third opening, and Di is the diameter of said second opening of said gate layer.
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Specification