Circuit for monitoring the usage of components within a computer system

• US 6,076,050 A
• Filed: 08/29/1997
• Issued: 06/13/2000
• Est. Priority Date: 09/06/1995
• Status: Expired due to Term

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micro Electronics Incorporated
• Inventors: Klein, Dean A.
• Primary Examiner(s): Hoff, Marc S.
• Assistant Examiner(s): MILLER, CRAIG S
• Application Number:
  US08/921,127
• Time in Patent Office: 1,019 Days
• Field of Search: 364/483, 364/550, 364/551.01, 364/569, 395/200.11, 395/835-839, 395/184.01, 395/750.05, 395/750.06, 702/58, 702/128, 702/187-188
• US Class Current: 702/188
• CPC Class Codes: G06F 11/3409 for performance assessment
• CPC Class Codes: G06F 11/3419 by assessing time
• CPC Class Codes: G06F 11/348 Circuit details, i.e. tracer hardware
• CPC Class Codes: G06F 21/86 Secure or tamper-resistant housings
• CPC Class Codes: G06F 2201/88 Monitoring involving counting
• CPC Class Codes: G06F 2221/2101 Auditing as a secondary aspect

Abstract

A usage monitor circuit monitors the amount of use of various components within a computer system. The circuit includes a plurality of timers and counters that are respectively coupled to the various components to be monitored such that the counters record the number of times the components are activated and the timers record the cumulative times the components are activated. The usage monitor circuit also includes a tamper protection unit that indicates whether the circuit has been tampered with.

Claims

1. A computer system comprising:

one or more components referred to as monitored components;

a monitor unit coupled to at least one of the one or more monitored components comprising at least one of a counter unit and a timer unit;

the monitor unit being connected (1) to receive an activity input signal when the monitored component is activated and (2) to record at least the first activity input signal so received in a nonvolatile data store; and

a tamper detection unit coupled to the monitor unit.

2. The computer system of claim 1, wherein the monitor unit comprises both a counter unit and a timer unit.

3. A usage monitor circuit for a computer system having a component, referred to as a monitored component, the usage monitor circuit comprising:

a monitor unit comprising at least one of a counter unit, and a timer unit, the monitor unit being connected to receive an activity input signal when the monitored component is activated and to record at least the first activity input signal so received in a nonvolatile data store; and

a tamper detection unit comprising an electrically erasable one-time programmable memory.

4. The usage monitor circuit of claim 3, wherein the monitor unit comprises both a counter unit and a timer unit.

5. A method for monitoring a hardware component usage, the method comprising:

receiving an activity input signal by at least one of a counter unit, and a timer unit when the hardware component is activated;

recording the input activity signal in a nonvolatile data store; and

detecting tampering efforts with an electrically erasable one-time programmable memory.

6. The method of claim 5, wherein receiving the activity input signal includes receiving the activity input signal by at least one of (1) a counter unit, and (2) a timer unit.

7. The method of claim 5 wherein receiving the activity input signal comprises receiving the activity input signal with both a counter unit and a timer unit.