Display memory cache

• US 6,078,316 A
• Filed: 05/03/1995
• Issued: 06/20/2000
• Est. Priority Date: 03/16/1992
• Status: Expired due to Fees

• Current Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Original Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Inventors: Page, Rich, Wiseman, James, Gibbons, Jon
• Primary Examiner(s): Lao, Lun-Yi
• Application Number:
  US08/434,285
• Time in Patent Office: 1,875 Days
• Field of Search: 345/100, 345/98, 345/97, 345/200, 345/197, 345/87, 345/88, 345/89-93, 345/204, 345/340, 345/3, 345/507, 345/516-518, 348/415
• US Class Current: 345/204
• CPC Class Codes: G09G 2310/04 Partial updating of the display screen
• CPC Class Codes: G09G 3/2092 Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto suitable for both CRT and flat panel G09G5/003; specific for a CRT G09G1/165
• CPC Class Codes: G09G 3/3611 Control of matrices with row and column drivers
• CPC Class Codes: G09G 5/395 Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen G09G5/399 takes precedence

Abstract

An optimized refresh strategy for increasing bandwidth of an LCD. The present invention results in an LCD suitable for dynamic display of information. In the present invention, a display memory is used to store display data generated by a CPU and to provide that data to an LCD. All data writes to the display memory by the CPU are tracked and rows or columns that contain modified data are tagged. These tags may be "set" by mapping the display memory write addresses to row or column numbers. The tags are examined and mapped back into the display memory addresses and only those rows or columns containing changed data are transferred to the data stream for display. As a result, only the information that is changed in the display memory is sent to the display and the dynamic bandwidth of the display is maximized. The refresh in the present invention can be either row-based or column-based.

Claims

1. A display system comprising:

processing means for generating display data and display addresses;

memory means coupled to said processing means for storing said display data at memory addresses corresponding to said display addresses;

logic means coupled to said processing means and said memory means;

row drivers coupled to said logic means and to a display means, said row drivers being for selectively enabling a row of pixels on said display means; and

column drivers coupled to said logic means and said display means, said column drivers being for selectively enabling a column of pixels on said display means,

said logic means identifying new data that is to be displayed and providing control signals to said row drivers and said column drivers such that those rows and columns containing the new data are enabled during a write cycle, and

said logic means being operable to enable contiguous or noncontiguous rows and columns, depending upon the display addresses of the new data to be displayed

wherein, if said logic means identifies a number of the display addresses having changed data as changed display locations, then the display addresses having changed data are mapped to corresponding memory addresses of the memory means and the corresponding memory addresses are stored in a storage means, where the memory addresses stored in the storage means are cleared after the changed data at the changed display locations has been written to a display, wherein when the number is less than or equal to a predetermined number, the rows or the columns containing the changed data are separately driven, and when the number is greater than the predetermined number, a plurality of contiguous rows or columns are driven as a region, said region including the rows or the columns containing the changed data.

2. The system of claim 1 wherein said logic means further includes first mapping means for mapping said memory address locations to display addresses and for mapping display addresses to said memory address locations.

3. The system of claim 1 wherein said memory means comprises a dual-ported video random access memory (VRAM).

4. The system of claim 1 wherein said memory means comprises a single-ported dynamic random access memory (DRAM).

5. The system of claim 1 wherein said processing means comprises a microprocessor.

6. The system of claim 1 wherein said row drivers enable selected ones of said rows with a row address signal.

7. The system of claim 1 wherein said column drivers enable selected ones of said columns with a column data signal.

8. The system of claim 1 wherein said column drivers enable selected ones of said columns with a column address signal.

9. The system of claim 1 wherein said row drivers enable selected ones of said rows with a row data signal.

10. The system of claim 1 wherein said display comprises a liquid crystal display (LCD) device.

11. A display system according to claim 1, further comprising:

discrimination means for determining whether or not a number of the display addresses stored by said storage means is larger than a predetermined number,

wherein, when said discrimination means determines that the number is less than or equal to the predetermined number, said rows or said columns are driven one-by-one, and when said discrimination means determines that the number is greater than the predetermined number, said rows or columns are not driven one-by-one.

12. A display system comprising:

processing means for generating display data and display addresses;

a video random access memory (VRAM) coupled to said processing means for storing said display data at memory addresses corresponding to said display addresses;

logic means coupled to said processing means and said VRAM;

row drivers coupled to said logic means and to a liquid crystal display (LCD) means, said row drivers being for selectively enabling a row of pixels on said LCD means; and

column drivers coupled to said logic means and said LCD means, said column drivers being for selectively enabling a column of pixels on said LCD means,

said logic means identifying new data that is to be displayed and providing control signals to said row drivers and said column drivers such that those rows and columns containing the new data are enabled during a write cycle, and

said logic means being operable to enable contiguous or noncontiguous rows and columns, depending upon the display addresses of the new data to be displayed,

wherein, if said logic means identifies a number of the display addresses having changed data as changed display locations, then the display addresses having changed data are mapped to corresponding memory addresses of the memory and the corresponding memory addresses are stored in a storage means, where the memory addresses stored in the storage means are cleared after the changed data at the changed display locations has been written to an LCD, wherein when the number is less than or equal to a predetermined number, the rows or the columns containing the changed data are separately driven, and when the number is greater than the predetermined number, a plurality of contiguous rows or columns are driven as a region, said region including the rows or the columns containing the changed data.

13. The system of claim 12 wherein said logic means further includes first mapping means for mapping said memory address locations to display addresses and for mapping display addresses to said memory address locations.

14. The system of claim 12 wherein said processing means comprises a microprocessor.

15. The system of claim 12 wherein said row drivers enable selected ones of said rows with a row address signal.

16. The system of claim 12 wherein said column drivers enable selected ones of said columns with a column data signal.

17. The system of claim 12 wherein said column drivers enable selected ones of said columns with a column address signal.

18. The system of claim 12 wherein said row drivers enable selected ones of said rows with a row data signal.

19. A display system according to claim 12, further comprising:

discrimination means for determining whether or not a number of the display addresses stored by said storage means is larger than a predetermined number,

wherein, when said discrimination means determines that the number is less than or equal to the predetermined number, said rows or said columns are driven one-by-one, and when said discrimination means determines that the number is greater than the predetermined number, said rows or columns are not driven one-by-one.

20. A display system comprising:

processing means for generating display data and display addresses;

a dynamic random access memory (DRAM) coupled to said processing means for storing said display data at memory addresses corresponding to said display addresses;

logic means coupled to said processing means and said DRAM;

memory controlling means coupled to said logic means and said DRAM;

row drivers coupled to said logic means and to a liquid crystal display (LCD) means, said row drivers being for selectively enabling a row of pixels on said LCD means; and

column drivers coupled to said logic means and said LCD means, said column drivers being for selectively enabling a column of pixels on said LCD means,

said logic means identifying new data that is to be displayed and providing control signals to said row drivers and said column drivers such that those rows and columns containing the new data are enabled during a write cycle, and

said logic means being operable to enable contiguous or noncontiguous rows and columns, depending upon the display addresses of the new data to be displayed,

wherein, if said logic means identifies a number of the display addresses having changed data as changed display locations, then the display addresses having changed data are mapped to corresponding memory addresses of the memory and the corresponding memory addresses are stored in a storage means, where the memory addresses stored in the storage means are cleared after the changed data at the changed display locations has been written to an LCD, wherein when the number is less than or equal to a predetermined number, the rows or the columns containing the changed data are separately driven, and when the number is greater than the predetermined number, a plurality of contiguous rows or columns are driven as a region, said region including the rows or the columns containing the changed data.

21. The system of claim 20 wherein said logic means further includes first mapping means for mapping said memory address locations to display addresses and for mapping display addresses to said memory address locations.

22. The system of claim 20 wherein said processing means comprises a microprocessor.

23. The system of claim 20 wherein said row drivers enable selected ones of said rows with a row address signal.

24. The system of claim 20 wherein said column drivers enable selected ones of said columns with a column data signal.

25. The system of claim 20 wherein said column drivers enable selected ones of said columns with a column address signal.

26. The system of claim 20 wherein said row drivers enable selected ones of said rows with a row data signal.

27. A display system according to claim 20, further comprising:

discrimination means for determining whether or not a number of the display addresses stored by said storage means is larger than a predetermined number,

wherein, when said discrimination means determines that the number is less than or equal to the predetermined number, said rows or said columns are driven one-by-one, and when said discrimination means determines that the number is greater than the predetermined number, said rows or columns are not driven one-by-one.