Accessory based resource offset mechanism for a PCI bus in a printer

• US 6,078,402 A
• Filed: 09/24/1997
• Issued: 06/20/2000
• Est. Priority Date: 09/24/1997
• Status: Expired due to Term

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Hewlett-Packard Company (HP Inc.)
• Inventors: Ockerse, Harold C., Fischer, Todd A., Bonar, Scott D., Jahr, Steven J.
• Primary Examiner(s): Coles, Edward L.
• Assistant Examiner(s): HENRY JR, COULTER C
• Application Number:
  US08/936,845
• Time in Patent Office: 1,000 Days
• Field of Search: 395/114, 395/112, 395/115, 395/116, 395/101, 395/821, 395/275, 710/8, 710/9, 710/12, 358/1.15, 358/1.13, 358/1.16, 358/1.18
• US Class Current: 358/1.16
• CPC Class Codes: G06F 3/1204 resulting in reduced user or operator actions, e.g. presetting, automatic actions, using hardware token storing data
• CPC Class Codes: G06F 3/1236 Connection management
• CPC Class Codes: G06F 3/1285 Remote printer device, e.g. being remote from client or server

Abstract

A peripheral device (such as a printer) locates shareable resources on an accessory by using an offset mechanism on the accessory. The offset mechanism includes one or more offset values stored in a first memory location on the accessory. The one or more offset values are indicative of offsets of one or more resources within the accessory memory. The one or more accessory resources are shareable with the peripheral device. A further offset value is stored in a second memory location on the accessory. The further offset value is indicative of an offset for determining the first memory location on the accessory. Additionally, a base address is stored in yet another memory location on the accessory and provides a general reference point for locating the first memory and accessory resources as mapped into the peripheral'"'"'s memory. In a preferred embodiment, the offset mechanism of the present invention is implemented as an enhanced feature of the PCI Local Bus Specification. For example, the first memory location is disposed in the PCI defined Memory Address Space of the accessory, and the second memory location and base address are both disposed in the PCI defined Configuration Address Space of the accessory. Advantageously, the present invention enables a peripheral device to locate resources on an accessory without knowing in advance where the resources are located on the accessory.

Claims

1. A computing device, comprising:

(a) a processor;

(b) an accessory device removably coupled to the computing device, the accessory having memory thereon and resources defined in the memory that are shareable with the computing device; and

,

(c) executable instructions stored in a memory of the computing device for execution by the processor, and wherein in response to execution of the instructions the processor communicates with the accessory via the accessory resources without prior knowledge of the address arrangement of the accessory resources in the accessory memory, the communication occurring by referencing at least two offset values in the accessory memory for identifying each resource.

2. The computing device of claim 1 wherein the computing device is an imaging device.

3. The computing device of claim 1 wherein the accessory device is an Input/Output device.

4. The computing device of claim 1 wherein the one or more shareable resources are memory locations that are readable, writeable, or read/writeable by the processor.

5. The computing device of claim 1 wherein the accessory memory includes:

(a) a base address stored in a first register in the accessory memory, the base address being indicative of a base reference location for identifying the accessory resources;

(b) a first of the offset values stored in a second register in the accessory memory, the first offset value being indicative of an offset relative to the base address for a third register in the accessory memory; and

,

(c) one or more second of the offset values stored in the third register, the one or more second offset values being indicative of offsets relative to the base address for one or more of the accessory resources.

6. The computing device of claim 5 wherein the first and second registers are included in a configuration address space of the accessory that is compatible with a PCI Local Bus Specification.

7. The computing device of claim 5 wherein the second offset value is stored within a class code field of a configuration address space of the accessory that is compatible with a PCI Local Bus Specification.

8. The computing device of claim 5 wherein the accessory includes means for loading the first offset value into the second register and the one or more second offset values into the third register upon an initialization of the accessory in the computing device.

9. An accessory, comprising:

(a) a connection for removably coupling the accessory to a computing device;

(b) a memory;

(c) a base address stored in a first register in the memory, the base address being indicative of a base reference location for identifying resources in the memory;

(d) a first offset value stored in a second register in the memory, the first offset value being indicative of an offset relative to the base address for a third register within the accessory memory; and

,

(e) one or more second offset values stored in the third register, the one or more second offset values being indicative of offsets relative to the base address for one or more of the resources, and wherein the one or more resources are shareable with the computing device; and

,

wherein upon connection with the computing device the resources are made available to the computing device without the computing device having prior knowledge of the address arrangement of the resources in the accessory memory, the resources made available by means of the computing device referencing the base address, the first offset value, and the one or more second offset values.

10. The accessory of claim 9 wherein the computing device is an imaging device.

11. The accessory of claim 9 wherein the accessory is an Input/Output device.

12. The accessory of claim 9 further including means for loading the first offset value into the second register and the one or more second offset values into the third register upon an initialization of the accessory in the computing device.

13. A method of establishing communication between a computing device and an accessory, comprising:

(a) removably coupling the accessory to the computing device, the accessory having memory thereon and resources defined in the memory that are shareable with the computing device; and

,

(b) executing instructions stored in a memory of the computing device to reference at least two offset values stored in the accessory memory for identifying a location of each of the shareable resources, wherein the computing device communicates with the accessory via the shareable resources without prior knowledge of the address arrangement of the shareable resources in the accessory memory.

14. The method of claim 13 wherein the offset values are referenced relative to a base address referenced in the accessory memory.

15. The method of claim 14 wherein one of the offset values is stored in a first memory location of the accessory and defines an offset to a second memory location of the accessory that stores at least one other of the offset values, and wherein the at least one other of the offset values defines an offset to at least one of the shareable resources in the accessory memory.

16. The method of claim 15 wherein a summing of the at least one other of the offset values and the base address identifies a location of a respective one of the shareable resources.

17. The method of claim 15 wherein the base address and first memory location are disposed within a configuration address space of the accessory that is compatible with a PCI Local Bus Specification.

18. The method of claim 13 wherein the computing device is an imaging device.

19. The method of claim 13 wherein the accessory is an input/output device.

20. A computer-readable medium having computer-executable instructions configured to reference at least two offset values stored in a memory of an accessory for identifying a location of a shareable resource in the memory without prior knowledge of an address of the shareable resource in the memory, the instructions further configured to enable a computing device to communicate with the accessory via the shareable resource.

21. A method of communicating between a computing device and an accessory, comprising, executing instructions to reference at least two offset values stored in a memory of the accessory for identifying a location of a shareable resource in the accessory memory without prior knowledge of the address of the shareable resource in the accessory memory, wherein the computing device is enabled to communicate with the accessory via the shareable resource.