Method for forming a trench power metal-oxide semiconductor transistor
First Claim
1. A method of forming a trench power metal-oxide semiconductor (MOS) transistor over a semiconductor substrate, said method comprises the following steps of:
- forming a pad oxide layer on said substrate;
forming a masking layer on said pad oxide layer;
etching said masking layer and said pad oxide layer to define a trench pattern on said masking layer and said pad oxide layer;
etching said substrate to form a trench structure on said substrate by using said masking layer as an etching mask;
forming a gate oxide layer on an outer surface of said trench structure;
forming a conducting layer to fill into said trench structure for serving as a gate structure, wherein a top surface of said conducting layer is lower than a top surface of said substrate,forming doped areas in said substrate to serve as source structures, wherein said doped areas are underneath said pad oxide layer and adjacent to said gate oxide layerforming sidewall spacers on sidewalls of said masking layer and said pad oxide layer for covering out surfaces of said gate oxide layer; and
forming a field oxide layer on said conducting layer, wherein said sidewall spacers are used to insulate said pad oxide layer for avoiding encroachment areas occurring and extending into said doped areas during forming said field oxide layer.
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Abstract
A method of forming a trench power metal-oxide semiconductor (MOS) transistor over a semiconductor substrate is proposed in the present invention. First, a pad oxide layer is formed on said substrate, a masking layer is then formed on the pad oxide layer. Next, the masking layer and the pad oxide layer are defined the trench pattern, and the substrate is etched to form the trench structure. A gate oxide layer is formed on the outer surface of the trench structure. Then, a conducting layer is fill into said trench structure for serving as a gate structure. The doped areas are formed in the substrate to serve as source structures. Next, the sidewall spacers are formed on sidewalls of the masking layer and the pad oxide layer. A field oxide layer is then formed on the conducting layer.
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Citations
20 Claims
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1. A method of forming a trench power metal-oxide semiconductor (MOS) transistor over a semiconductor substrate, said method comprises the following steps of:
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forming a pad oxide layer on said substrate; forming a masking layer on said pad oxide layer; etching said masking layer and said pad oxide layer to define a trench pattern on said masking layer and said pad oxide layer; etching said substrate to form a trench structure on said substrate by using said masking layer as an etching mask; forming a gate oxide layer on an outer surface of said trench structure; forming a conducting layer to fill into said trench structure for serving as a gate structure, wherein a top surface of said conducting layer is lower than a top surface of said substrate, forming doped areas in said substrate to serve as source structures, wherein said doped areas are underneath said pad oxide layer and adjacent to said gate oxide layer forming sidewall spacers on sidewalls of said masking layer and said pad oxide layer for covering out surfaces of said gate oxide layer; and forming a field oxide layer on said conducting layer, wherein said sidewall spacers are used to insulate said pad oxide layer for avoiding encroachment areas occurring and extending into said doped areas during forming said field oxide layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A method of forming a trench power metal-oxide semiconductor (MOS) transistor over a semiconductor substrate, said method comprises the following steps of:
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forming a pad oxide layer on said substrate; forming a first nitride layer on said pad oxide layer; etching said first nitride layer and said pad oxide layer to define a trench pattern on said first nitride layer and said pad oxide layer; etching said substrate to form a trench structure on said substrate by using said first nitride layer as an etching mask; forming a gate oxide layer on an outer surface of said trench structure; forming a doped polysilicon layer to fill into said trench structure, wherein a top surface of said doped polysilicon layer is lower than a top surface of said substrate; forming doped areas in said substrate, wherein said doped areas are underneath said pad oxide layer and adjacent to said gate oxide layer; forming a second nitride layer on surfaces of said first nitride layer, said pad oxide layer, said gate oxide layer and said doped polysilicon layer; etching said second nitride layer to expose a top surface of said doped polysilicon layer, wherein sidewall spacers are formed on sidewalls of said first nitride layer and said pad oxide layer for covering out surfaces of said gate oxide layer; and forming a field oxide layer on said doped polysilicon layer, wherein said sidewall spacers are used to insulate said pad oxide layer for avoiding encroachment areas extending into said doped areas during forming said field oxide layer. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20)
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Specification