Semiconductor device

• US 6,081,036 A
• Filed: 03/09/1998
• Issued: 06/27/2000
• Est. Priority Date: 04/19/1996
• Status: Expired due to Term

• Current Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Matsushita Electric Corporation (Panasonic Holdings Corporation)
• Inventors: Honda, Toshiyuki, Hirano, Hiroshige
• Primary Examiner(s): Picard, Leo P.
• Assistant Examiner(s): DUONG, HUNG V
• Application Number:
  US08/973,891
• Time in Patent Office: 841 Days
• Field of Search: 257/390, 257/295, 257/305, 257/758, 257/773, 257/775, 257/767, 257/310
• US Class Current: 257/773
• CPC Class Codes: H01L 28/55 with a dielectric comprising a perovskite structure material
• CPC Class Codes: H01L 28/60 Electrodes

Abstract

A semiconductor device is provided wich includes a first wiring and second wirings in which end portions of the second wirings connected to the first wiring are bent parallel to that forms a predetermined angle with respect to the first direction. The first wiring extends along a first direction and has a wiring width direction in a second direction perpendicular to the first direction, where stresses are generated inside. The second wirings are situated above the first wiring, connected to the first wiring through a contact hole, and affected by the stresses of the first wiring.

Claims

1. A semiconductor device including:

a first wiring extending along a first direction and having a wiring width direction in a second direction perpendicular to the first direction, where stresses are generated inside; and

second wirings which are situated above the first wiring, connected to the first wiring through a contact hole, and affected by the stresses of the first wiring;

said second wirings including end portions which are connected to the first wiring, said end portions of said second wirings being bent in a direction which is parallel to a direction that forms a predetermined angle with respect to the first direction and on a plane including the first direction and the second direction.

2. The semiconductor device as defined in claim 1, wherein;

the end portions of the second wirings connected to the first wiring are bent parallel to the second direction perpendicular to the first direction.

3. The semiconductor device as defined in claim 1, wherein the first wiring comprises at least one member selected from the group consisting of platinum, iridium, titanium and tungsten.

4. The semiconductor device as defined in claim 1, further comprising an insulating layer formed on the surface of the first wiring, said insulating layer comprising a ferroelectric material.

5. A semiconductor device including:

a first wiring extending along a first direction and having a wiring width direction and a second direction perpendicular to the first direction, where stresses are generated inside; and

second wirings which are situated above the first wiring, connected to end portions of the first wiring through a contact hole, and affected by the stresses of the first wiring;

wherein the second wirings include end portions which are bent with respect to the remainder of the second wirings, said end portions being on a plane which is parallel to a plane defined by said first wiring and includes the first direction and the second direction, wherein tip parts of the end portions of the second wirings are connected to the first wiring and are disposed to extend along the first wiring and toward the inside of the first wiring.

6. The semiconductor device as defined in claim 5, wherein the first wiring comprises at least one member selected from the group consisting of platinum, iridium, titanium and tungsten.

7. The semiconductor device as defined in claim 5, further comprising an insulating layer formed on the surface of the first wiring, said insulating layer comprising a ferroelectric material.

8. A semiconductor device including:

a first wiring extending along a first direction and having a wiring width which is planarly perpendicular to the first direction; and

second wirings which are situated above the first wiring, connected to the first wiring through a contact hole and affected by the stresses of the first wiring;

wherein the first wiring has a bent portion formed at a portion of the first wiring; and

the second wirings having end portions connected to the first wiring, said end portions being bent parallel to a direction that forms a predetermined angle with respect to the first direction on a plane including the first direction and the second direction.

9. The semiconductor device as defined in claim 8, wherein;

a body of the first wiring, except end portions that are connected to the second wirings, is bent at a plurality of positions to have a zigzag plan shape.

10. The semiconductor device as defined in claim 9, wherein;

the first wiring body comprises only oblique wiring parts parallel to directions, except a direction perpendicular to a first direction, or only the oblique wiring parts and wiring parts parallel to the first direction.

11. The semiconductor device as defined in claim 8, wherein the first wiring comprises at least one member selected from the group consisting of platinum, iridium, titanium and tungsten.

12. The semiconductor device as defined in claim 8, further comprising an insulating layer formed on the surface of the first wiring, said insulating layer comprising a ferroelectric material.

20. The semiconductor device as defined in claim 8, wherein the first wiring comprises at least one member selected from the group consisting of platinum, iridium, titanium and tungsten.

21. The semiconductor device as defined in claim 8, further comprising an insulating layer formed on the surface of the first wiring, said insulating layer comprising a ferroelectric material.

13. A semiconductor device including:

a first wiring extending along a first direction and having a wiring width direction in a second direction perpendicular to the first direction, where stresses are generated inside; and

second wirings which are situated above the first wiring, connected to the first wiring through a contact hole, and affected by the stresses of the first wiring

wherein the whole of the first wiring is divided into a plurality of wiring parts; and

the respective wiring parts of the first wiring are electrically connected by the second wirings to form a predetermined current path extending from one end of the first wiring to the other end, the respective wiring parts of the first wiring having wiring lengths, each wiring length being not more than twenty times that of a corresponding wiring width.

14. A ferroelectric memory device having a plurality of ferroelectric capacitors, said device including:

a first wiring, which extends along a first direction and having a wiring width direction in a second direction perpendicular to the first direction, where stresses are generated inside; and

second wirings, which are electrically connected to the first wiring and are affected by the stresses of the first wiring, said first wiring and said second wirings constituting the ferroelectric capacitors,

wherein the first wiring has narrow wiring width portions formed by chipping portions of a first wiring body, with the exception of end portions that are connected to the second wirings, the wiring width of each of the narrow wiring width portions being narrower than that of remaining wiring width portions except the end portions, and the length of the narrow wiring width portions being shorter than that of the remaining wiring width portions.

15. The semiconductor device as defined in claim 14, wherein;

the narrow wiring width portions are formed by chipping the first wiring body from the both sides at predetermined positions in the wiring path.

16. The semiconductor device as defined in claim 15, wherein;

sides of the narrow wiring width portions are parallel to directions, except a direction perpendicular to the first direction.

17. The semiconductor device as defined in claim 14, wherein;

the first wiring body has at least a first narrow wiring width portion that is formed by chipping the body from one side, and at least a second narrow wiring width portion that is formed by chipping the body from the other side.

18. The semiconductor device as defined in claim 17, wherein;

the wiring widths of the first and second narrow wiring width portions are smaller than 1/2 of those of the portions of the first wiring body, except the narrow wiring width portions, and the current path along the center line of the first wiring is divided by the chipped parts at the first and second narrow wiring width portions.

19. The semiconductor device as defined in claim 17, wherein;

sides of the first and second narrow wiring width portions at the chipped part sides are parallel to directions, except a direction perpendicular to the first direction.

24. The semiconductor device as defined in claim 14, wherein the first wiring comprises at least one member selected from the group consisting of platinum, iridium, titanium and tungsten.

25. The semiconductor device as defined in claim 14, further comprising an insulating layer formed on the surface of the first wiring, said insulating layer comprising a ferroelectric material.

28. The semiconductor device as defined in claim 19, including:

first and second memory cell groups each comprising a plurality of memory cells;

first and second bit line groups corresponding to the first and second memory cell groups;

first and second word line groups provided corresponding to the first and second memory cell groups, and comprising a plurality of word lines for controlling ON and OFF of transistors constituting the memory cells of the corresponding memory cell groups; and

sense amplifiers connected to the respective bit lines of the first and second bit line groups, for sensing storage data on the bit lines, wherein;

the first electrode of the ferroelectric capacitor constituting each memory cell is connected to a cell plate line for applying a predetermined driving voltage to the electrode;

the second electrode of the ferroelectric capacitor constituting each memory cell of the first memory cell group is connected to the corresponding bit line of the first bit line group through the transistor of the first memory cell group;

the second electrode of the ferroelectric capacitor constituting each memory cell of the second memory cell group is connected to the corresponding bit line of the second bit line group through the transistor of the second memory cell group; and

the word line of the first word line group and the word line of the second word line group are simultaneously selected so that complementary data is read out onto the corresponding bit lines of both of the bit line groups.

22. A ferroelectric memory device having ferroelectric capacitors including:

a first wiring which extends along a first direction and having a wiring width direction in a second direction perpendicular to the first direction, where stresses are generated inside; and

second wirings which are situated above the first wiring, connected to the first wiring through a contact hole, and affected by the stresses of the first wiring, said first wiring and said second wirings constituting ferroelectric capacitors,

said first wiring having through openings that are formed in a first wiring body, said body including end portions which are connected to the second wirings.

23. The semiconductor device as defined in claim 22, wherein;

the plan shapes of the through openings are made a rectangular shape in which the length in the first direction is smaller than the length in the second direction perpendicular to the first direction.

26. A semiconductor device constituting a ferroelectric memory device with a plurality of memory cells comprising transistors and ferroelectric capacitors, wherein:

the ferroelectric capacitor comprises a first electrode where stresses are generated inside, a second electrode positioned opposite to this first electrode, and a ferroelectric layer positioned between the first and second electrodes;

the first electrode having a bent portion formed at its portion.

27. The semiconductor device as defined in claim 26, wherein;

a body of the first electrode, except both end portions, is bent at a plurality of positions to have a zigzag plan shape.

29. A semiconductor device constituting a ferroelectric memory device with a plurality of memory cells comprising transistors and ferroelectric capacitors, wherein:

the ferroelectric capacitor comprises a first electrode that extends along a first direction, where stresses are generated inside, a second electrode positioned opposite to this first electrode, and a ferroelectric layer positioned between the first and second electrodes;

the whole of the first electrode being divided into a plurality of electrode parts, and the respective electrode parts being electrically connected to form a predetermined current path extending from one end of the first electrode to the other end.